MC9S08DN60 Datasheet, PDF (121/354 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7 Central Processor Unit (S08CPUV3)
Table 7-2. Instruction Set Summary (Sheet 6 of 9)
Source
Form
Operation
Object Code
MOV opr8a,opr8a
MOV opr8a,X+
MOV #opr8i,opr8a
MOV ,X+,opr8a
MUL
NEG opr8a
NEGA
NEGX
NEG oprx8,X
NEG ,X
NEG oprx8,SP
NOP
NSA
ORA #opr8i
ORA opr8a
ORA opr16a
ORA oprx16,X
ORA oprx8,X
ORA ,X
ORA oprx16,SP
ORA oprx8,SP
PSHA
PSHH
PSHX
PULA
PULH
PULX
ROL opr8a
ROLA
ROLX
ROL oprx8,X
ROL ,X
ROL oprx8,SP
ROR opr8a
RORA
RORX
ROR oprx8,X
ROR ,X
ROR oprx8,SP
Move
(M)_destination ← (M)_source
In IX+/DIR and DIR/IX+ Modes,
H:X ← (H:X) + $0001
DIR/DIR
DIR/IX+
IMM/DIR
IX+/DIR
Unsigned multiply
X:A ← (X) × (A)
INH
Negate
M ← – (M) = $00 – (M) DIR
(Two’s Complement) A ← – (A) = $00 – (A) INH
X ← – (X) = $00 – (X) INH
M ← – (M) = $00 – (M) IX1
M ← – (M) = $00 – (M) IX
M ← – (M) = $00 – (M) SP1
No Operation — Uses 1 Bus Cycle
INH
Nibble Swap Accumulator
A ← (A[3:0]:A[7:4])
INH
IMM
DIR
EXT
Inclusive OR Accumulator and Memory
IX2
A ← (A) | (M)
IX1
IX
SP2
SP1
Push Accumulator onto Stack
Push (A); SP ← (SP) – $0001
INH
Push H (Index Register High) onto Stack
Push (H); SP ← (SP) – $0001
INH
Push X (Index Register Low) onto Stack
Push (X); SP ← (SP) – $0001
INH
Pull Accumulator from Stack
SP ← (SP + $0001); Pull (A)
INH
Pull H (Index Register High) from Stack
SP ← (SP + $0001); Pull (H)
INH
Pull X (Index Register Low) from Stack
SP ← (SP + $0001); Pull (X)
INH
Rotate Left through Carry
DIR
INH
INH
C
IX1
b7
b0
IX
SP1
Rotate Right through Carry
DIR
INH
INH
C
IX1
b7
b0
IX
SP1
4E dd dd
5E dd
6E ii dd
7E dd
42
30 dd
40
50
60 ff
70
9E 60 ff
9D
62
AA ii
BA dd
CA hh ll
DA ee ff
EA ff
FA
9E DA ee ff
9E EA ff
87
8B
89
86
8A
88
39 dd
49
59
69 ff
79
9E 69 ff
36 dd
46
56
66 ff
76
9E 66 ff
Affect
Cyc-by-Cyc
Details
on CCR
V11H INZC
5 rpwpp
5 rfwpp
4 pwpp
5 rfwpp
011––↕↕–
5 ffffp
–110–––0
5 rfwpp
1p
1p
5 rfwpp
4 rfwp
6 prfwpp
1p
↕11––↕↕↕
–11–––––
1p
–11–––––
2 pp
3 rpp
4 prpp
4 prpp
3 rpp
3 rfp
5 pprpp
4 prpp
011––↕↕–
2 sp
–11–––––
2 sp
–11–––––
2 sp
–11–––––
3 ufp
–11–––––
3 ufp
–11–––––
3 ufp
5 rfwpp
1p
1p
5 rfwpp
4 rfwp
6 prfwpp
5 rfwpp
1p
1p
5 rfwpp
4 rfwp
6 prfwpp
–11–––––
↕11––↕↕↕
↕11––↕↕↕
MC9S08DN60 Series Data Sheet, Rev 2
Freescale Semiconductor
121