FIN24C_06 Datasheet, PDF (4/25 Pages) Fairchild Semiconductor – uSerDes™Low-Voltage 24-Bit Bi-Directional Serializer/Deserializer

Connection Diagrams
DP[9] 1
DP[10] 2
DP[11] 3
DP[12] 4
VDDP 5
CKP 6
DP[13] 7
DP[14] 8
DP[15] 9
DP[16] 10
30 DIRO
29 CKSO+
28 CDSO-
27 DSO+ / DSI-
26 DSO- / DSI+
25 CKSI-
24 CKSI+
23 DIRI
22 S2
21 VDDS
Figure 2. Terminal Assignments for MLP (Top View)
123456
A
B
C
D
E
F
J
(Top View)
1
A DP[9]
B DP[11]
C CKP
D DP[13]
E DP[15]
F DP[17]
J DP[19]
2
DP[7]
DP[10]
DP[12]
DP[14]
DP[16]
DP[18]
DP[20]
Pin Assignments
3
4
5
6
DP[5]
DP[3]
DP[1]
CKREF
DP[6]
DP[2] STROBE
DIRO
DP[8]
DP[4]
CKSO+
CKSO-
V_DDP
GND
DP[21]
DP[22]
GND
V_DDS
V_DDA
DP[23]
DSO- / DSI+ DSO+ / DSI-
CKSI+
CKSI-
S2
DIRI
DP[24]
S1
Figure 3. Terminal Assignments for µBGA
©2005 Fairchild Semiconductor Corporation
FIN24C Rev. 1.0.2
4
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