FIN24C_06 Datasheet, PDF (2/25 Pages) Fairchild Semiconductor – uSerDes™Low-Voltage 24-Bit Bi-Directional Serializer/Deserializer

Functional Block Diagram
CKREF
STROBE
DP[m+1:24]
DP[1:m]
Note:
m = 20 or 22
I/O
Control
CKP
S1
S2
DIRI
PLL
cksint
Word
+
0
Boundary
Generator
–
I
Serializer
Control
Serializer ⁺
–
oe
+
Deserializer
–
Deserializer
Control
cksint
+
–
CKS0+
CKS0-
DSO+/DSI-
DSO-/DSI+
100Ω Gated
Termination
CKSI+
CKSI-
WORD CK
Generator
Control Logic
Freq. Direction
Control Control
oe
Power Down
Control
DIRO
100Ω
Termination
Figure 1. Block Diagram
©2005 Fairchild Semiconductor Corporation
FIN24C Rev. 1.0.2
2
www.fairchildsemi.com