FIN324C Datasheet, PDF (18/23 Pages) Fairchild Semiconductor – 24-Bit Ultra-Low Power Serializer Deserializer Supporting Single and Dual Displays

Typical Performance Characteristics
Setup Time
t_S1
STROBE
DP,CNTL
Data
Hold Time
t_H1
STROBE
DP,CNTL
Data
Setup: CKSEL=0 or 1, R/W=0
Figure 11. Master Write Setup and Hold Time
t_S-STRB
STRB0
STRB1
t_S-STRB
CKSEL
DP,CNTL
Data
Setup: CKSEL=0 or 1, R/W=0
Figure 13. CKSEL Write Setup Time
Setup Time
STRBn
CNTL,R/W
t_S2
Control
Hold Time
STRBn
CNTL,R/W
t_H2
Control
Setup: CKSEL=0 or 1, R/W=1
Figure 12. Master Read Setup and Hold Time
t_S-STRB
STRB0
STRB1
t_S-STRB
CKSEL
CNTL
Data
Setup: CKSEL=0 or 1, R/W=1
Figure 14. CKSEL Read Setup Time
STRBn
CKS
DS
DP
CNTL
WCLKn
t_PD-WRn
t_CSn
t_PWL-WRn
t_PDV-WRn
Setup: CKSEL=0 or 1, R/W=0, PAR/SPI=1
Figure 15. Slave Write Mode Timing
STRBn
CKS
DS
SDAT
SCLK
t_PD-SPI
t_CS
t_PWL-SPI
t_PDV-SPI
Setup: CKSEL=0, R/W=0, PAR/SPI=0
Figure 16. Slave SPI Mode Timing
© 2006 Fairchild Semiconductor Corporation
FIN324C Rev. 1.0.5
18
www.fairchildsemi.com