XR88C681CP Datasheet, PDF (63/99 Pages) Exar Corporation – CMOS DUAL CHANNEL UART (DUART)

XR88C681
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note that the applicable bits, within the ACR register, are shaded.
Bit 7
BRG Set
Select
 J 
 J 
Bit 6
Bit 5
Bit 4
Counter/Timer Mode and Source
 Table 7
Bit 3
Delta IP3
Interrupt
J
 J 7
Bit 2
Delta IP2
Interrupt
J
 J 7
Bit 1
Delta IP1
Interrupt
J
 J 7
Bit 0
Delta IP0
Interrupt
J
 J 7
Table 23. ACR- Auxiliary Control Register
 ( - #N>O
Note: This “two-tiered” interrupt enabling/disabling approach, for the “Input Change of State” interrupt allows tremendous flexibility
for the user. Setting or clearing the bits in ACR[3:0] allows the user to specify exactly which Input Port pins to be enabled (or
disabled) for generating the “Input Port Change of State” interrupt. Setting or clearing IMR[7] allows the user to “globally”
enable or disable this interrupt.
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