English
Language : 

XR88C681CP Datasheet, PDF (39/99 Pages) Exar Corporation – CMOS DUAL CHANNEL UART (DUART)
XR88C681
;
#7
CPU
;
#7
#2#
#2
# :
#7
#2#
#2
# :
#7
#2#
#2
# :
#7
#2#
#2
# :
# :
8#082
,##G
9B2
Figure 15. A Diagram of Numerous DUARTs Configured in an Interrupt
Daisy Chain (for Z-Mode Operation)
# $$((   #7  $ # : ( %"  ?$
  % % %  #2#  $ #2 ( %L  ('  $ +( $
% +%4
IEI - Interrupt Enable Input
 (% '(  (- (  (%  & ( (+    (%
' +(- $    (  ?$  #+  (% (  (%  
-(' C (- D    %3 $ (    E %%" +
 (%  "   $
Note:
Those interrupts which have been masked out by the IMR are
still disabled. However, if this input is at a logic “low”, then all
interrupts (whether masked or unmasked) are disabled.
Hence, IEI can act to globally disable all DUART interrupt
requests.
IEO - Interrupt Enable Output
 (% '(  (-  (%  & ( (+    (%
' +(- $    (  ?$   (%  (% +
( % ' ' $   #2# (  +      ((&
$ ('   (%  (% C (- D (+  +  +( -
' $(( %   
  $ (' H% #2# (  (%   -(' C (- D
  $ (' (%   E %( -  (   + 
,
 (  "  E % $ &  $ (' " % M% 
% (' $
#+  & +  % ' $(( %  +% "   #2 ( ( 
  -(' CD
Note:
Once the IEO pin has toggled “low”, and the CPU has ac-
knowledged the interrupt request and has completed the inter-
rupt service routine, the IEO pin will remain “low” until the user
invokes the “RESET IUS” command (see Table 3). Therefore,
if the DUART is going to operate in the Z-Mode, the user must
include the “RESET IUS” Command at the very end of the
DUART interrupt service routine.
System Level Application of the IEI and IEO pins
Figure 15 $ ('%  % ( % +  % ' ' $ ( 
$(%&' ( +% (  #  (% +(- "   +%  
%  (- % (   ((&  (% (%  '%  (%
 H% #2# (  (% $( $  ;''   + " 
 %3 $ (    E %%" +  (%   
&%  $    $ (' " ' $ M%  
(-  +  C (- % (   ((&D $ (' (% +   
(   ((&  (% (%  '%  #2# (  +  (%  
((& $ (' (% ' ' $   #2  + 
(- % ((&   B    C (- % ((&D
$ ('  E %%  (  " (% #2  ( --
CD  (% ( (  " $(%  C  ((&D $ ('
  
1