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XR88C681CP Datasheet, PDF (39/99 Pages) Exar Corporation – CMOS DUAL CHANNEL UART (DUART) | |||
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XR88C681
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CPU
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Figure 15. A Diagram of Numerous DUARTs Configured in an Interrupt
Daisy Chain (for Z-Mode Operation)
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IEI - Interrupt Enable Input
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Note:
Those interrupts which have been masked out by the IMR are
still disabled. However, if this input is at a logic âlowâ, then all
interrupts (whether masked or unmasked) are disabled.
Hence, IEI can act to globally disable all DUART interrupt
requests.
IEO - Interrupt Enable Output
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Note:
Once the IEO pin has toggled âlowâ, and the CPU has ac-
knowledged the interrupt request and has completed the inter-
rupt service routine, the IEO pin will remain âlowâ until the user
invokes the âRESET IUSâ command (see Table 3). Therefore,
if the DUART is going to operate in the Z-Mode, the user must
include the âRESET IUSâ Command at the very end of the
DUART interrupt service routine.
System Level Application of the IEI and IEO pins
Figure 15 $('% %(% +
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