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XR88C681CP Datasheet, PDF (20/99 Pages) Exar Corporation – CMOS DUAL CHANNEL UART (DUART) | |||
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XR88C681
one or two characters are still remaining in RHRA, following
data reception. Hence, it is possible that the last two char-
acters in a string of data (being received) could be lost due
to this phenomenon. Therefore, the user is advised to read
RHRA until empty.
ISR[0]: Channel A Transmitter Ready
(% ( (% $(' + 5G
"
NO
(% ("
%" (
$('% 8
(% &
$ (%
$& '' ' ' + , ( (%
'$
, (%
' ' 8
L
$ (% % -(
"
' ' (%
%+$
5G
(% %
%( (% (
((&
$
$ (% '$
%( (% $(%$
'% $$ (
8
(
%( (%
$(%$ (
%($
C.2 Interrupt Mask Register (IMR)
#
%3 -(% (% CB(
&D -(%
('
% % %' '
$((
% (
'%
(%%
#
E%
'%% #
$%" % % (
+
%3(
- '3(
- '(
'
$((
% + '%(
-
(%%
#
E% +"
(+ + # (% %%
(& % % #
8" + '
%%" *( + # (%
%
$
Bit 7
Input Port
Change
J ++
J
Bit 6
Delta Break
B
J ++
J
Bit 5
RXRDY/
FFULLB
J ++
J
Bit 4
TXRDYB
J ++
J
Bit 3
Counter
Ready
J ++
J
Bit 2
Delta Break
A
J ++
J
Bit 1
RXRDY/
FFULLA
J ++
J
Bit 0
TXRDYA
J ++
J
Table 6. IMR Bit Format
#+ % (% %
'(
(
" .%
% $ ( CD ( ( (
#" '%
$(
-
#
$((
9(3(%" $(% %3
'(
'
$((
'%(
-
(
" %
% $ ( CD ( '(
'%
$(
-
'
$((
(
% % $ (
/ CD% (% -(%%
Please note that IMR is a Write Only Registers, and can
therefore not be read by the processor.
C.3 Masked Interrupt Status Register (MISR)
'
+ # -(% (% %('& %% +
7(
- #
$ # -
#
J N#
%O N#
%O
(((
+
#
(' (
%
&
$(
- # (% (% ( (
# '
-- C (- D $ ( '%
$(
- '
$((
%
&
$ & # +"
%" +(
- $(
- #
% -(%"
( 3 (%(
% +L
$ !' C(&(D
7 + #
$ # '
% (
' # (%
CB(
&D -(%
$ '
$ & '%%"
'
% + # ( %$ (
%&%
&" + ' $$((
$
$
%+ $ E($ % (% '((& '
((
$ ( % + #
C.4 Interrupt Vector Register, IVR
(% -(% (%
& %$ + #
;' -
(
(% '
$$ (
%'( ?$
B ( (
(% $" '
% + #; (% &('&
$ %(
- $$%% +
% #
(' (
(%" (
#$" #
;' -
(
(% &('& +$ ++' ( B
(% (
- (
#$" #; '
%$ % -
% $.( -(%% +
#;" (
(% (
- (
?$ (%
%
$ (
Section C.6
C.5 Limitations of the DUART Interrupt Structure
#
' ++$ &
%
% -
-
(
% (
%
% '(
8
$ 8 # '
$((
%L
.( $& '
$((
"
$ '
-% (
*3
$((
'( 8" %($ +
C *3
$((
D *"
H% #
' $%
+ (
E%% $
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