XR88C681CP Datasheet, PDF (44/99 Pages) Exar Corporation – CMOS DUAL CHANNEL UART (DUART)

XR88C681
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Note: The LSB of the IVR is always set to “0” once read by the CPU. Interrupt Service Routines must begin at even ddresses.
Table 13. The Relationship between the Contents of the Interrupt Vector Register (of the DUART)
and the location of the Interrupt Service Routine (Z-80 CPU)
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XR88C681
Figure 19. Schematic of an Approach to Interface the DUART to the Z-80
CPU (for Z-Mode Operation)
 
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