XR17V254 Datasheet, PDF (61/70 Pages) Exar Corporation – 66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT

REV. 1.0.0
XR17V254
66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT
FIGURE 20. DEVICE CONFIGURATION AND UART REGISTERS READ OPERATION FOR A BYTE OR DWORD
CLK
Host
1
2
3
4
5
6
7
8
9
FRAME#
Host
AD[31:0]
Host Target
Address
Data
BYTE
Data
WORD
C/BE[3:0]#
Host
Bus
CMD
Byte Enable# = BYTE
Byte Enable# = DWORD
IRDY#
Host
10
11
TRDY#
Target
DEVSEL#
Target
PAR
Host Target
Address
Parity
Data
Parity
PERR#
Target
SERR#
Targe
t
Active
Note: PERR# and SERR are optional in a bus target application.
Even Parity is on AD[31:0], C/BE[3:0]#, and PAR
Active
Data
Parity
Active
PCI_RD1
61