XR17V254 Datasheet, PDF (51/70 Pages) Exar Corporation – 66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT

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XR17V254
66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT
TABLE 18: AUTO RS485 HALF-DUPLEX DIRECTION CONTROL DELAY FROM TRANSMIT-TO-RECEIVE
MSR[7] MSR[6] MSR[5] MSR[4] DELAY IN DATA BIT(S) TIME
0
0
0
0
0
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
0
1
0
0
4
9
1
0
1
5
0
1
1
0
6
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
1
0
1
0
10
1
0
1
1
11
1
1
0
0
12
1
1
0
1
13
1
1
1
0
14
1
1
1
1
15
MSR [3]: Transmitter Disable (requires EFR bit [4]=1)
This bit can be used to disable the transmitter by halting the Transmit Shift Register (TSR). When this bit is set
to a ’1’, the bytes already in the FIFO will not be sent out. Also, any more data loaded into the FIFO will stay in
the FIFO and will not be sent out. When this bit is set to a ’0’, the bytes currently in the TX FIFO will be sent
out. Please note that setting this bit to a ’1’ stops any character from going out. Also, this bit must be a ’0’ for
Send Char Immediate function (see MCR[3]).
• Logic 0 = Enable Transmitter (default).
• Logic 1 = Disable Transmitter.
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