XR21B1422IL40-0A Datasheet, PDF (51/60 Pages) Exar Corporation – Enhanced 2-Ch Full-Speed USB UART

XR21B1422
PIN_CFG_RTS (0x025) - Read/Write OTP
This register configures the functionality of the GPIO5/RTS#/RS485 pin.
Bit
7
6
5:3
2:0
Default
Description
0
PULLUP_EN
This register bit is used to enable the internal pull-up resistor. This setting will be ignored if GPIO5/RTS#/RS485 is configured
as an output.
0: Do not enable internal pull-up
1: Enable internal pull-up if configured as an input
0
PULLDOWN_EN
This register bit is used to enable the internal pull-down resistor. This setting will be ignored if GPIO5/RTS#/RS485 is config-
ured as an output.
0: Do not enable internal pull-down
1: Enable internal pull-down if configured as an input (will not be enabled if Pull up is enabled)
0
RESERVED
These bits are reserved and should be written as ’0’.
0
CTRL
Note: If configured as RTS output, GPIO4/CTS# must be configured as CTS input and GPIO2/DSR# and GPIO3/DTR# must
be configured as GPIOs.
000: GPIO5/RTS#/RS485 is configured as a GPIO input
001: GPIO5/RTS#/RS485 is configured as a GPIO open drain output
010: GPIO5/RTS#/RS485 is configured as a GPIO push-pull output
011: GPIO5/RTS#/RS485 is configured as a open drain RTS output
100: GPIO5/RTS#/RS485 is configured as a push-pull RTS output
PIN_CFG_CTS (0x026) - Read/Write OTP
This register configures the functionality of the GPIO4/CTS# pin.
Bit
7
6
5:2
1:0
Default
Description
0
PULLUP_EN
This register bit is used to enable the internal pull-up resistor. This setting will be ignored if GPIO4/CTS# is configured as an
output.
0: Do not enable internal pull-up
1: Enable internal pull-up if configured as an input
0
PULLDOWN_EN
This register bit is used to enable the internal pull-down resistor. This setting will be ignored if GPIO4/CTS# is configured as
an output.
0: Do not enable internal pull-down
1: Enable internal pull-down if configured as an input (will not be enabled if Pull up is enabled)
0
RESERVED
These bits are reserved and should be written as ’0’.
0
CTRL
Note: If configured as CTS input, GPIO5/RTS# must be configured as RTS# output and GPIO2/DSR# and GPIO3/DTR#
must be configured as GPIOs.
00: GPIO4/CTS# is configured as a GPIO input
01: GPIO4/CTS# is configured as a GPIO open drain output
10: GPIO4/CTS# is configured as a GPIO push-pull output
11: GPIO4/CTS# is configured as a open drain CTS input
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