XR21B1422IL40-0A Datasheet, PDF (34/60 Pages) Exar Corporation – Enhanced 2-Ch Full-Speed USB UART

TX_FIFO_COUNT (0x041) - Read Only
This register is used to read the number of bytes currently in the transmit FIFO.
Bit
15:10
9:0
Default
Description
0
Reserved
These bits are reserved and should be written as ‘0’.
0
Count
Reports the number of bytes currently in the TX FIFO.
TX_WIDE_MODE (0x042) - Read/Write
This register is used to enable the Wide Mode for the Transmitter.
Bit
15:1
0
Default
Description
0
Reserved
These bits are reserved and should be written as ‘0’.
0
Enable
0: Normal (5, 6, 7, 8 or 9 bit data) mode
1: Wide mode
RX_FIFO_FLUSH (0x043) - Write Only
This register is used to flush the receive FIFO.
Bit
15:3
2
1
0
Default
Description
0
Reserved
These bits are reserved and should be written as ‘0’.
0
AUTO_CLOSE
0: No effect on the RX FIFO when the UART port RX is disabled
1: The RX FIFO is automatically flushed when the UART port RX is disabled
1
AUTO_OPEN
0: No effect on the RX FIFO when the UART port RX is enabled
1: The RX FIFO is automatically flushed when the UART port RX is enabled
0
Reset
0: No effect on the RX FIFO
1: Resets the RX FIFO, self-clearing
RX_FIFO_COUNT (0x044) - Read Only
This register is used to read the number of bytes currently in the receive FIFO.
Bit
15:10
Default
Description
0
Reserved
These bits are reserved and should be written as ‘0’.
© 2014 Exar Corporation
34 / 60
XR21B1422
exar.com/XR21B1422
Rev 1A