XR20M1172G28-0B Datasheet, PDF (25/55 Pages) Exar Corporation – TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO

XR20M1172
REV. 1.2.0
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
3.0 UART INTERNAL REGISTERS
The complete register set is shown below in Table 7 and Table 8.
TABLE 7: UART INTERNAL REGISTER ADDRESSES
ADDRESS
REGISTER
READ/WRITE
COMMENTS
16C550 COMPATIBLE REGISTERS
0X00
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0X00
0X01
DLL - Divisor LSB
DLM - Divisor MSB
Read/Write
Read/Write
LCR[7] = 1, LCR ≠ 0xBF
0X02
DLD - Divisor Fractional
Read/Write
LCR[7] = 1, LCR ≠ 0xBF,
EFR[4] = 1
0X01
0X02
IER - Interrupt Enable Register
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read/Write
Read-only
Write-only
LCR[7] = 0
0X03
LCR - Line Control Register
Read/Write
0X04
0X05
MCR - Modem Control Register
LSR - Line Status Register
Read/Write
Read-only
LCR ≠ 0xBF
0X06
MSR - Modem Status Register
Read-only
See Table 12
0X07
SPR - Scratch Pad Register
Read/Write
See Table 13
0X06
TCR - Transmission Control Register
Read/Write
See Table 12
0X07
TLR - Trigger Level Register
Read/Write
See Table 13
0X08
TXLVL - Transmit FIFO Level
Read-only
0x09
RXLVL - Receive FIFO Level
Read-only
0x0A
IODir - GPIO Direction Control Register
Read/Write
0x0B
0x0C
IOState - GPIO State Register
IOIntEna - GPIO Interrupt Enable Register
Read/Write
Read/Write
LCR[7] = 0
0x0D
Reserved
-
0x0E
IOControl - GPIO Control Register
Read/Write
0x0F
EFCR - Extra Features Control Register
Read/Write
0x02
EFR - Enhanced Function Register
Read/Write
0x04
Xon-1 - Xon Character 1
Read/Write
0x05
Xon-2 - Xon Character 2
Read/Write
LCR = 0xBF
0x06
Xoff-1 - Xoff Character 1
Read/Write
0x07
Xoff-2 - Xoff Character 2
Read/Write
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