XR20M1172G28-0B Datasheet, PDF (1/55 Pages) Exar Corporation – TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO

XR20M1172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
OCTOBER 2013
REV. 1.2.0
GENERAL DESCRIPTION
The XR20M1172¹ (M1172) is a high performance two
channel universal asynchronous receiver and
transmitter (UART) with 64 byte TX and RX FIFOs
and a selectable I²C/SPI slave interface. The M1172
operates from 1.62 to 3.63 volts. The standard
features include 16 selectable TX and RX FIFO
trigger levels, automatic hardware (RTS/CTS) and
software (Xon/Xoff) flow control, and a complete
modem interface. Onboard registers provide the user
with operational status and data error flags. An
internal loopback capability allows system
diagnostics. Additional enhanced features includes a
programmable fractional baud rate generator and 8X
and 4X sampling rate that allows for a maximum baud
rate of 16 Mbps at 3.3V. The M1172 is available in the
32-pin QFN and 28-pin TSSOP packages. The 32-
pin QFN package has the EN485# and ENIR# pins to
allow the UART to power-up in the Auto RS485 mode
or the Infrared mode.
NOTE: 1 Covered by U.S. Patent #5,649,122
APPLICATIONS
• Portable Appliances
• Battery-Operated Devices
• Cellular Data Devices
• Factory Automation and Process Controls
FEATURES
• 1.62 to 3.6 Volt Operation
• Selectable I²C/SPI Interface
• SPI clock frequency up to
s 18 MHz at 3.3 V
s 16 MHz at 2.5 V
s 8 MHz at 1.8 V
• Full-featured UART
s Data rate of up to 16 Mbps at 3.3 V
s Data rate of up to 12.5 Mbps at 2.5 V
s Data rate of up to 8 Mbps at 1.8 V
s Fractional Baud Rate Generator
s Transmit and Receive FIFOs of 64 bytes
s 16 Selectable TX and RX FIFO Trigger Levels
s Automatic Hardware (RTS/CTS) Flow Control
s Automatic Software (Xon/Xoff) Flow Control
s Halt and Resume Transmission Control
s Automatic RS-485 Half-duplex Direction
Control Output via RTS#
s Wireless Infrared (IrDA 1.0 and 1.1) Encoder/
Decoder
s Automatic sleep mode (< 30 uA at 3.3V)
s General Purpose I/Os
s Full modem interface
• Crystal oscillator (up to 24MHz) or external clock
(up to 64MHz) input
• 32-QFN and 28-TSSOP packages
FIGURE 1. XR20M1172 BLOCK DIAGRAM
VCC
E N IR #
EN 485#
IR Q #
RESET#
SDA
SCK
A0/C S#
A1/S I
SO
I2 C / S P I#
1.62 V – 3.63V
I² C / S P I
Inte rfa ce
C rystal
O sc /
B u ffe r
Channel 1
64 B yte
U A R T T X F IF O
R egs
6 4 B yte
R X F IF O
BRG
G P IO s
UART Channel 2
(S im ila r to C h a n n e l1 )
TXA
RXA
RTSA#
CTSA#
G P IO [7:0 ]
TXB
RXB
RTSB#
CTSB#
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • [phone] • FAX [phone] • www.exar.com