XR16C850 Datasheet, PDF (20/55 Pages) Exar Corporation – UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control

XR16C850
(Programmed word length) + 12. To convert the time out
value to a character value, the user has to consider the
complete word length, including data information
length, start bit, parity bit, and the size of stop bit, i.e.,
1X, 1.5X, or 2X bit times.
Example -A: If the user programs a word length of 7, with
no parity and one stop bit, the time out will be:
T = 4 X 7( programmed word length) +12 = 40 bit times.
The character time will be equal to 40 / 9 = 4.4
characters, or as shown in the fully worked out example:
T = [(programmed word length = 7) + (stop bit = 1) +
(start bit = 1) = 9]. 40 (bit times divided by 9) = 4.4
characters.
Example -B: If the user programs the word length = 7,
with parity and one stop bit, the time out will be:
T = 4 X 7(programmed word length) + 12 = 40 bit times.
Character time = 40 / 10 [ (programmed word length =
7) + (parity = 1) + (stop bit = 1) + (start bit = 1) = 4
characters.
Due to limitations involved in servicing a number of
simultaneous interrupts in PCs and multi-channel sys-
tems, the 850 offers shared wire-or interrupts by setting
MCR bit-5 to a logic 1. When using this mode, the
connection of a 200-500 ohm resistor is required be-
tween the IRQA/INT pin and signal ground to provide an
acceptable logic 0 level. The other interrupts (IRQB,
IRQC) are inactive when using this mode.
Programmable Baud Rate Generator
The 850 supports high speed modem technologies that
have increased input data rates by employing data
compression schemes. For example a 33.6Kbps mo-
dem that employs data compression may require a
115.2Kbps input data rate. A 128.0Kbps ISDN modem
that supports data compression may need an input data
rate of 460.8Kbps. The 850 can support a standard data
rate of 921.6Kbps with a crystal of 14.7456MHz.
A single baud rate generator is provided for the transmit-
ter and receiver, allowing independent TX/RX channel
control. The programmable Baud Rate Generator is
capable of accepting an input clock up to 24 MHz, as
required for supporting a 1.5Mbps data rate. The 850
can be configured for internal or external clock opera-
tion. For internal clock oscillator operation, an industry
standard microprocessor crystal (parallel resonant/ 22-
33 pF load) is connected externally between the XTAL1
and XTAL2 pins, with an external 500K to 1 MΩ resistor
across it. The serial 50-120Ω resistor on pin XTAL2 may
be deleted for high frequency crystal operation. Alterna-
tively, an external clock can be connected to the XTAL1
pin to clock the internal baud rate generator for standard
or custom rates.
The generator divides the input 16X clock by any divisor
from 1 to 2¹⁶ -1. The 850 divides the basic crystal or
external clock by 16. Further division of this 16X clock
provides two table rates to support low and high data
rate applications using the same system design. The
two rate tables are selectable through the internal
register, MCR bit-7. Setting MCR bit-7 to a logic 1
provides an additional divide by 4 whereas, setting MCR
bit-7 to a logic 0 only divides by 1. (See Table 4 and
Figure 11). The frequency of the -BAUDOUT output pin
is exactly 16X (16 times) of the selected baud rate (-
BAUDOUT =16 x Baud Rate). Customized Baud Rates
can be achieved by selecting the proper divisor values
for the MSB and LSB sections of baud rate generator.
Programming the Baud Rate Generator Registers DLM
(MSB) and DLL (LSB) provides a user capability for
selecting the desired final baud rate. The example in
Table 4 below, shows the two selectable baud rate
tables available when using a 7.3728 MHz crystal.
R1
50-120
R2
1M
X1
1.8432 MHz
C1
C2
22pF
33pF
Rev. 1.20
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