XRT94L33_2 Datasheet, PDF (135/810 Pages) Exar Corporation – 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SDH REGISTERS

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XRT94L33
333---CCCHHHAAANNNNNNEEELLL DDDSSS333///EEE333///SSSTTTSSS---111 TTTOOO SSSTTTSSS---333///SSSTTTMMM---111 MMMAAAPPPPPPEEERRR ––– SSSDDDHHH RRREEEGGGIIISSSTTTEEERRRSSS
Change in K1,
K2 Byte Unstable
Defect Condition
Interrupt Status
New K1, K2 Byte
Value Interrupt
Status
RUR
RUR
occurred since the last read of this register.
1 – Indicates that the “Receive SOH Data Capture” Interrupt has occurred
since the last read of this register.
Change of K1, K2 Byte Unstable Defect Condition Interrupt Status:
This RESET-upon-READ bit-field indicates whether or not the “Change in
K1, K2 Byte Unstable Defect Condition” interrupt has occurred since the last
read of this register. The Receive STM-1 SOH Processor block will
generate this interrupt in response to either of the following events.
• Whenever the Receive STM-1 SOH Processor block declares the “K1, K2
Byte Unstable Defect” condition.
• Whenever the Receive STM-1 SOH Processor block clears the “K1, K2
Byte Unstable Defect” condition.
0 – Indicates that the “Change of K1, K2 Byte Unstable Defect Condition”
interrupt has NOT occurred since the last read of this register.
1 – Indicates that the “Change of K1, K2 Byte Unstable Defect Condition”
interrupt has occurred since the last read of this register.
Note:
The user can determine if the Receive STM-1 SOH Processor
block is currently declaring the “K1, K2 Byte Unstable Defect
Condition” by reading out the contents of Bit 5 (K1, K2 Byte
Unstable Defect Declared), within the “Receive STM-1 Section
Status Register – Byte 0” (Address Location = 0x1107).
New K1, K2 Byte Value Interrupt Status:
This RESET-upon-READ bit-field indicates whether or not the “New K1, K2
Byte Value” Interrupt has occurred since the last read of this register. The
Receive STM-1 SOH Processor block will generate this interrupt whenever it
has “accepted” a new set of K1, K2 byte values from the incoming STM-1
data-stream.
0 – Indicates that the “New K1, K2 Byte Value” Interrupt has NOT occurred
since the last read of this register.
1 – Indicates that the “New K1, K2 Byte Value” Interrupt has occurred since
the last read of this register.
Note:
The user can obtain the contents of the new K1 byte by reading out
the contents of the “Receive STM-1 Section K1 Byte Value”
Register (Address Location= 0x111F). Further, the user can also
obtain the contents of the new K2 byte by reading out the contents
of the “Receive STM-1 Section K2 Byte Value” Register (Address
Location= 0x1123).
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