RFM95 Datasheet, PDF (85/121 Pages) List of Unclassifed Manufacturers – Low Power Long Range Transceiver Module

WIRELESS & SENSING
RFM95/96/97/98(W)
PRELIMINARY
DATASHEET
Address
0x1D
0x1E
0x1F
0x20
0x21
Register Name
FSK/OOK Mode
RegFeiMsb
RegFeiLsb
RegPreambleDe-
tect
RegRxTimeout1
RegRxTimeout2
LoRa^TM Mode
RegNbRxBytes
RegRxHeaderInfo
RegRx-
HeaderCntValue
RegRxPacketCnt-
Value
RegModemStat
0x22
0x23
0x24
0x25
0x26
0x27
0x28-
0x2F
0x30
0x31
0x32
RegRxTimeout3 RegPktSnrValue
RegRxDelay
RegOsc
RegRssiValue
RegPktRssiValue
RegPreambleMsb
RegPreambleLsb
RegSyncConfig
RegSyncValue1-8
RegHopChannel
RegRxDataAddr
RegPacketConfig1
RegPacketConfig2
RegPayloadLength
RESERVED
Reset Default
(POR) (FSK)
0x00
0x00
0x40
0xAA
0x00
0x00
0x00
0x00
0x05
0x07
0x00
0x03
0x93
0x55
0x01
0x90
0x40
0x40
Description
FSK Mode
Value of the calculated
frequency error
Settings of the Preamble
Detector
Timeout Rx request and RSSI
Timeout RSSI and Pay-
loadReady
Timeout RSSI and SyncAd-
dress
Delay between Rx cycles
RC Oscillators Settings, CLK-
OUT frequency
Preamble length, MSB
Preamble length, LSB
Sync Word Recognition control
LoRa^TM Mode
Number of received bytes
Info from last header
Number of valid headers
received
Number of valid packets
received
Live LoRa^TM modem sta-
tus
Espimation of last packet
SNR
Current RSSI
RSSi of last packet
FHSS start channel
LoRa^TM rx data pointer
Sync Word bytes, 1 through 8
Packet mode settings
Packet mode settings
RESERVED
Payload length setting
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x44
0x4B
RegNodeAdrs
RegBroadcastAdrs
RegFifoThresh
RegSeqConfig1
RegSeqConfig2
RegTimerResol
RegTimer1Coef
RegTimer2Coef
RegImageCal
RESERVED
RegTemp
RegLowBat
RegIrqFlags1
RegIrqFlags2
RegDioMapping1
RegDioMapping2
RegVersion
RegPllHop
Unused
RegTcxo
0x00
0x00
0x0F
0x8F
0x00
0x00
0x00
0xF5
0x20
0x82
0x02
-
0x02
0x80
0x40
0x00
0x00
0x11
0x2D
0x09
Node address
Broadcast address
Fifo threshold, Tx start condi-
tion
Top level Sequencer settings
Top level Sequencer settings
Timer 1 and 2 resolution control
Timer 1 setting
Timer 2 setting
Image calibration engine con-
trol
RESERVED
Temperature Sensor value
Low Battery Indicator Settings
Status register: PLL Lock state,
Timeout, RSSI
Status register: FIFO handling
flags, Low Battery
Mapping of pins DIO0 to DIO3
Mapping of pins DIO4 and DIO5, ClkOut frequency
Hope RF ID relating the silicon revision
Control the fast frequency hop-
ping mode
Unused
TCXO or XTAL input setting
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