RFM95 Datasheet, PDF (3/121 Pages) List of Unclassifed Manufacturers – Low Power Long Range Transceiver Module

RFM95/96/97/98（W）
Section
Page
4.2.13. Packet Mode ........................................................................................................................................... 66
4.2.14. io-homecontrol® Compatibility Mode ...................................................................................................... 74
4.3. SPI Interface .................................................................................................................................................. 75
5. RFM95/96/97/98(W) Analog & RF Frontend Electronics........................................................................................ 76
5.1. Power Supply Strategy .................................................................................................................................. 76
5.2. Low Battery Detector ..................................................................................................................................... 76
5.3. Frequency Synthesis ..................................................................................................................................... 76
5.3.1. Crystal Oscillator ....................................................................................................................................... 76
5.3.2. CLKOUT Output ........................................................................................................................................ 77
5.3.3. PLL ............................................................................................................................................................ 77
5.3.4. RC Oscillator ............................................................................................................................................. 77
5.4. Transmitter Description ...............................................................................................................................78
5.4.1. Architecture Description ............................................................................................................................ 78
5.4.2. RF Power Amplifiers.................................................................................................................................. 78
5.4.3. High Power +20 dBm Operation ............................................................................................................... 79
5.4.4. Over Current Protection .........................................................................................................................80
5.5. Receiver Description ...................................................................................................................................... 80
5.5.1. Overview ................................................................................................................................................... 80
5.5.2. Receiver Enabled and Receiver Active States.......................................................................................... 80
5.5.3. Automatic Gain Control In FSK/OOK Mode .............................................................................................. 80
5.5.4. RSSI in FSK/OOK Mode ........................................................................................................................... 81
5.5.5. RSSI in LoRaTM Mode ............................................................................................................................. 82
5.5.6. Channel Filter ............................................................................................................................................ 82
5.5.7. Temperature Measurement ....................................................................................................................... 83
6. Description of the Registers.................................................................................................................................... 84
6.1. Register Table Summary ............................................................................................................................... 84
6.2. FSK/OOK Mode Register Map....................................................................................................................... 87
6.3. Band Specific Additional Registers .............................................................................................................. 100
6.4. LoRaTM Mode Register Map ....................................................................................................................... 102
7. Application Information ........................................................................................................................................ 108
7.1. Crystal Resonator Specification ................................................................................................................... 108
7.2. Reset of the Chip ......................................................................................................................................... 108
7.2.1. POR......................................................................................................................................................... 108
7.2.2. Manual Reset .......................................................................................................................................109
7.3. Top Sequencer: Listen Mode Examples ...................................................................................................... 109
7.3.1. Wake on Preamble Interrupt ................................................................................................................... 109
7.3.2. Wake on SyncAddress Interrupt ...........................................................................................................112
7.4. Top Sequencer: Beacon Mode .................................................................................................................115
7.4.1. Timing diagram........................................................................................................................................ 115
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