VS1053B Datasheet, PDF (63/79 Pages) List of Unclassifed Manufacturers – Ogg Vorbis/MP3/AAC/WMA/MIDI AUDIO CODEC

VLSI
Solution ^y
VS1053b preliminary
VS1053B
9. OPERATION
9.12.3 SCI Test
Sci test is initialized with the 8-byte sequence 0x53 0x70 0xEE n 0 0 0 0, where n − 48 is the register
number to test. The content of the given register is read and copied to SCI HDAT0. If the register to be
tested is HDAT0, the result is copied to SCI HDAT1.
Example: if n is 48, contents of SCI register 0 (SCI MODE) is copied to SCI HDAT0.
9.12.4 Memory Test
Memory test mode is initialized with the 8-byte sequence 0x4D 0xEA 0x6D 0x54 0 0 0 0. After this
sequence, wait for 1100000 clock cycles. The result can be read from the SCI register SCI HDAT0, and
’one’ bits are interpreted as follows:
Bit(s)
15
14:10
9
8
7
6
5
4
3
2
1
0
Mask
0x8000
0x0200
0x0100
0x0080
0x0040
0x0020
0x0010
0x0008
0x0004
0x0002
0x0001
0x83ff
Meaning
Test finished
Unused
Mux test succeeded
Good MAC RAM
Good I RAM
Good Y RAM
Good X RAM
Good I ROM 1
Good I ROM 2
Good Y ROM
Good X ROM 1
Good X ROM 2
All ok
Memory tests overwrite the current contents of the RAM memories.
9.12.5 New Sine and Sweep Tests
A more frequency-accurate sine test can be started and controlled from SCI. SCI AICTRL0 and SCI AICTRL1
set the sine frequencies for left and right channel, respectively. These registers, volume (SCI VOL), and
samplerate (SCI AUDATA) can be set before or during the test. Write 0x4020 to SCI AIADDR to start
the test.
SCI AICTRLn can be calculated from the desired frequency and DAC samplerate by:
SCI AICT RLn = F_sin × 65536/F_s
The maximum value for SCI AICTRLn is 0x8000U. For the best S/N ratio for the generated sine, three
Version 0.5, 2007-12-03
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