RF64 Datasheet, PDF (55/76 Pages) List of Unclassifed Manufacturers – ADVANCED COMMUNICATIONS & SENSING

ADVANCED COMMUNICATIONS & SENSING
Table 23: Interrupt Mapping in Rx and Stby in Packet Mode
IRQ_0
IRQ_1
Rx_stby_irq_x
00 (d)
01
10
11
00 (d)
01
10
11
Rx
Payload_ready
Write_byte
/Fifoempty
Sync or Adrs_match*
CRC_OK
Fifofull
RSSI
Fifo_threshold
Stby
-
-
/Fifoempty
-
-
Fifofull
-
Fifo_threshold
*The latter if Address filtering is enabled
IRQ_0
IRQ_1
Tx_start_irq_0=0 (d)
Tx_start_irq_0=1
Tx_irq_1=0 (d)
Tx_irq_1=1
Table 24: Interrupt Mapping in Tx Packet Mode
Tx
Fifo_threshold
/Fifoempty
Fifofull
Tx_done
5.5.8. uC Connections
RF64
IRQ_0
IRQ_1
NSS_CONFIG
NSS_DATA
SCK
MOSI
MISO
uC
RF64
Figure 48: uC Connections in Packet Mode
Note that depending upon the application, some uC connections may not be needed:
 IRQ_0: if none of the relevant IRQ sources are used. In this case, leave floating.
 IRQ_1: if none of the relevant IRQ sources are used. In this case, leave floating.
 MISO: if no read register access is needed and the chip is used in Tx mode only. In this case, pull up to VDD
through a 100 kΩ resistor.
In addition, DATA pin (unused in packet mode) should be pulled-up to VDD through a 100 kΩ resistor.
Please refer to Table 13 for the RF64‟s pin configuration.
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