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RF64 Datasheet, PDF (46/76 Pages) List of Unclassifed Manufacturers – ADVANCED COMMUNICATIONS & SENSING
ADVANCED COMMUNICATIONS & SENSING
RF64
Data Rx
(to SR) “noisy” data
Start condition
(Cf. Fifo_fill_method)
/Fifoempty
Fifofull
Fifo_overrun_clr
W rite_byte
Preamble
15
FIFO
0
Sync
b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 b15 b16
b15
b14
b13
b12
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
Figure 40: Rx Processing in Buffered Mode (FIFO size=16, Fifo_fill_method=0)
5.4.4. Interrupt Signals Mapping
The tables below describe the interrupts available in Buffered mode.
IRQ_0
IRQ_1
Rx_stby_irq_x
00 (d)
01
10
11
00 (d)
01
10
11
Rx
-
Write_byte
/Fifoempty
Sync
-
Fifofull
RSSI
Fifo_threshold
Table 20: Interrupt Mapping in Buffered Rx and Stby Modes
Stby
-
-
/Fifoempty
-
-
Fifofull
-
Fifo_threshold
IRQ_0
IRQ_1
Tx_start_irq_0=0 (d)
Tx_start_irq_0=1
Tx_irq_1=0 (d)
Tx_irq_1=1
Table 21: Interrupt Mapping in Tx Buffered Mode
Tx
Fifo_threshold
/Fifoempty
Fifofull
Tx_done
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