RF64 Datasheet, PDF (41/76 Pages) List of Unclassifed Manufacturers – ADVANCED COMMUNICATIONS & SENSING

ADVANCED COMMUNICATIONS & SENSING
RF64
5.3. Continuous Mode
5.3.1. General Description
As illustrated in Figure 34, in Continuous mode the NRZ data to (from) the (de)modulator is directly accessed by
the uC on the bidirectional DATA pin (20). The SPI Data, FIFO and packet handler are thus inactive.
Tx/Rx
RF64
CONTROL
DATA
IRQ_0
IRQ_1(DCLK)
Data Rx _SYNC
RECOG.
SPI
CONFIG
NSS_CONFIG
SCK
MOSI
MISO
Datapath
Figure 34: Continuous Mode Conceptual View
5.3.2. Tx Processing
In Tx mode, a synchronous data clock for an external uC is provided on IRQ_1 pin. Its timing with respect to the
data is illustrated in Figure 35. DATA is internally sampled on the rising edge of DCLK so the uC can change logic
state anytime outside the greyed out setup/hold zone.
The use of DCLK is compulsory in FSK and optional in OOK.
T_DATA T_DATA
DATA (NRZ)
DCLK
Figure 35: Tx Processing in Continuous Mode
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