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SDA9401 Datasheet, PDF (64/69 Pages) List of Unclassifed Manufacturers – Scan Rate Converter using Embedded DRAM Technology Units
SDA 9401
9 Characteristics (Assuming Recommended Operating Conditions)
Parameter
Symbol Min Max Unit Remark
Average Supply Current
t.b.d. t.b.d. mA
All Digital Inputs (Including I/O Inputs)
All VDD pins, typ. t.b.d. mA
Input Capacitance
10
pF
Input Leakage Current
-5
5
µA
TTL Inputs: YIN, UVIN, HIN, VIN (Referenced To CLK1)
Set-Up Time
tSU
7
ns
see diagr. 11.3
Input Hold Time
tIH
6
ns
TTL Outputs: YOUT, UVOUT, HREF, INTERLACED (Referenced To CLKOUT*)
Hold time
tOH
6
ns
Delay time
tOD
25
ns
TTL Outputs: HOUT, VOUT (Referenced To CLKOUT)
see diagr. 11.3
CL = 30 pF, 27 MHz
Hold time
tOH
6
Delay time
tOD
25
TTL Inputs: SYNCEN (Referenced To CLK1)
ns
see diagr. 11.3
ns
CL = 50 pF, 27 MHz
Set-Up Time
Input Hold Time
tSU
25
tIH
0
ns
see diagr. 11.3
ns
*: see also Clock concept on page 27
Micronas
64
Preliminary Data Sheet