SDA9401 Datasheet, PDF (28/69 Pages) List of Unclassifed Manufacturers – Scan Rate Converter using Embedded DRAM Technology Units

SDA 9401
Clock
CLK1_pll1
CLK2_pll2
Used in block
ISC, IFC, LDR, ED, MC, LM, I²C
OSC, HDR, ED, MC, LM, OFC
Input write parameter
Parameter
PLL1OFF
1: off
0: on
PLL1RA
PLL2OFF
1: off
0: on
PLL2RA
CLKOUTON
1: enabled
0: disabled
Subaddress
02h
PLL 1 on or off
Description
09h,0Ah
16h
PLL range, only for test purposes
PLL 2 on or off
19h
PLL range, only for test purposes
16h
Output of system clock
Micronas
28
Preliminary Data Sheet