SDA9401 Datasheet, PDF (45/69 Pages) List of Unclassifed Manufacturers – Scan Rate Converter using Embedded DRAM Technology Units

SDA 9401
6.8 I²C bus
6.8.1 I²C bus slave address
Write Adress: BCh
Read Adress: BDh
10111100
10111101
6.8.2 I²C bus format
The SDA 9401 I²C bus interface acts as a slave receiver and a slave transmitter and provides two
different access modes (write, read). All modes run with a subaddress auto increment. The interface
supports the normal 100 kHz transmission speed as well as the high speed 400 kHz transmission.
write:
S1 0 1 1 1 1 0 0 A
S: Start condition
A: Acknowledge
P: Stop condition
NA: Not Acknowledge
read:
S1 0 1 1 1 1 0 0 A
Subaddress
Subaddress
A Data Byte A _***** A P
A S 1 0 1 1 1 1 0 1 A Data Byte A
Data Byte NA P
The transmitted data are internally stored in registers. The master has to write a don’t care byte to
the subaddress FFh (store command) to make the register values available for the SDA 9401. To
have a defined time step, where the data will be available, the data are made valid with the incoming
V-sync VIN or with the next OPSTART pulse, which is an internal signal and indicates the start of a
new output cycle. The subaddresses, where the data are made valid with the VIN signal are
indicated in the overview of the subaddresses with „VI“, where the data are made valid with the
OPSTART are indicated with „OS“. The I²C parameter VISTATUS and OSSTATUS (subaddress
33h) reflect the state of the register values. If these bits are read as ’0’, then the store command was
sent, but the data aren’t made available yet. If these bits are ’1’ then the data were made valid and a
new write or read cycle can start. The bits VISTATUS and OSSTATUS may be checked before
writing or reading new data, otherwise data can be lost by overwriting.
Furthermore the bit NMSTATUS (status of noise measurement: NOISEME). NMSTATUS signalizes
a new value for NOISEME. So if NMSTATUS is read as ’0’ the current noise measurement has not
Micronas
45
Preliminary Data Sheet