ACD82124 Datasheet, PDF (45/48 Pages) List of Unclassifed Manufacturers – 24 Ports 10/100 Fast Ethernet Switch Controller

The CfgReg is used to configure the way the ACD80800
works. The bit definition of CfgReg is described as:
• bit 0 - disable address aging
• bit 1 - disable address lookup
• bit 2 - disable DA cache
• bit 3 - disable SA cache
• bit 7:4 - hashing algorithm selection, de-
fault is 0000
The IntSrcReg is used to indicate what can cause in-
terrupt request to CPU. The source of interrupt is listed
as:
• bit 0 - aged address exists
• bit 1 - new address exists
• bit 2 - reserved
• bit 3 - reserved
• bit 4 - bucket overflowed
• bit 5 - command is done
• bit 6 - system initialization is completed
• bit 7 - self test failure
The IntMskReg is used to enable an interrupt source
to generate an interrupt request. The bit definition is
the same as IntSrcReg. A 1 in a bit enables the corre-
sponding interrupt source to generate an interrupt re-
quest once it is set.
The nLearnReg[2:0] are used to disable address learn-
ing activity from a particular port. If the bit correspond-
ing to a port is set, ACD80800 will not try to learn new
addresses from that port.
The AgeTimeReg[1:0] are used to specify the period
of address aging control. The aging period can be
from 0 to 65535 units, with each unit counted as 2.684
second.
The PosCfgReg is a configuration register whose de-
fault value is determined by the pull-up or pull-down
status of the associated hardware pin. The bits of
PosCfgReg0 is listed as follows:
• bit 3 – BISTEN: “0” = self test disabled,
“1” = self test enabled;
• bit 2 - TESTEN, “0” = normal operation,
“1” = production test enabled;
• bit 1* - NOCPU^*, “0” = presence of con-
trol CPU, “1” = no control CPU;
• bit 0 - CPUGO, “0” = wait for System
Start command from CPU before start-
ing self initialization, “1” = CPU ready.
Only effective when bit-1 (NOCPU) is set
to 0;
Note: When NOCPU is set as 0, ACD80800 will not
start the initialization process until a System Start com-
mand is sent to the command register.
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