ACD82124 Datasheet, PDF (4/48 Pages) List of Unclassifed Manufacturers – 24 Ports 10/100 Fast Ethernet Switch Controller

4. SYSTEM DESCRIPTION
The ACD82124 is a single chip implementation of a
24-port Fast Ethernet switch. Together with external
ASRAM and transceiver devices, it can be used to
build a complete desktop class Fast Ethernet switch.
Each individual port can be either auto-sensed or manu-
ally selected to run at 10 Mbps or 100 Mbps speed
rate, under Half Duplex mode.
The ACD82124 Ethernet switch contains three major
functional blocks: the Media Access Controller (MAC),
the Queue Manager, and the Lookup Engine.
There are 24 independent MACs within the ACD82124.
The MAC controls the receiving, transmitting, and de-
ferring process of each individual port, in accordance
to IEEE 802.3 and 802.3u standard. The MAC logic
also provides framing, FCS checking, error handling,
status indication and back-pressure flow control func-
tions. Each MAC interfaces with an external transceiver
through standard MII interface.
The device utilizes ACD’s proprietary BASIQ (Band-
width Assured Switching with Intelligent Queuing) tech-
nology. It is a technology to enforce the first-in-first-
out rule of Ethernet Bridge-type devices in a very effi-
cient way. The technology enables a true non-block-
ing frame switching operation at wire speed for a high
throughput and high port density Ethernet switch.
The on-chip 2,000 MAC addresses Lookup Engine
maps each destination address into a destination port.
Each port’s MAC address is automatically learned by
the Lookup Engine when it receives a frame with no
error. Therefore, the ACD82124 alone can be used to
build a desktop class Fast Ethernet switch without any
additional switching devices.
The MAC address space can be expanded from 2,000
to 8,000 per system by using the ACD80800. The
ACD82124 has a proprietary ARL interface that allows
direct connection with ACD80800. System designers
can also use this ARL interface to implement a ven-
dor-specific address resolution algorithm.
The ACD82124 provides management support through
its MIB (Management Information Base) interface. The
MIB interface can be used to monitor all traffic activi-
ties of the switch system. ACD’s supporting chip (the
ACD80900) provides a full set of statistical counters to
support both SNMP and RMON network management.
The MIB interface can also be used by system de-
signers to implement vendor-specific network manage-
ment functionality.
Among the 24 MII interfaces, 10 of them can be con-
figured as reversed MII, to connect directly with stand-
alone MAC controller devices. A MAC in the ACD82124
can be viewed logically as a PHY device if it is config-
ured as a reversed MII interface. The reversed MII is
intended for a CPU network interface, or expansion
port interface.
A system CPU can access various registers inside
the ACD82124 through a serial CPU management
interface. The CPU can configure the switch by
writing into the appropriate registers, or retrieve the
status of the switch by reading the corresponding
registers. The CPU can also access the registers of
external transceiver (PHY) devices through the CPU
management interface.
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