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STC4130 Datasheet, PDF (35/44 Pages) List of Unclassifed Manufacturers – Synchronous Clock for SETS
Default value: 0.
Bit 3 ~ Bit 0
1101 ~ 1111
T4_Long_Term_Accu_History, 0x41 (R)
STC4130
Synchronous Clock for SETS
Data Sheet
Phase Align Mode/Ref selection
Holdover
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x41
Bits 0 - 7 of 32 bit Long Term Holdover History
0x42
Bits 8 - 15 of 32 bit Long Term Holdover History
0x43
Bits 16 - 23 of 32 bit Long Term Holdover History
0x44
Bits 24 - 31 of 32 bit Long Term Holdover History
Long term accumulated history for T4 relative to the TCXO. Resolution is 0.745x10-3 ppb.
T4_Short_Term_Accu_History, 0x45 (R)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x45
Bits 0 - 7 of 32 bit Short Term Holdover History
0x46
Bits 8 - 15 of 32 bit Short Term Holdover History
0x47
Bits 16 - 23 of 32 bit Short Term Holdover History
0x48
Bits 24 - 31 of 32 bit Short Term Holdover History
Short term accumulated history for T4 relative to the TCXO. Resolution is 0.745x10-3 ppb.
T4_User_Accu_History, 0x49 (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
0x49
Bits 0 - 7 of 32 bit User Holdover History
0x4a
Bits 8 - 15 of 32 bit User Term Holdover History
0x4b
Bits 16 - 23 of 32 bit User Term Holdover History
0x4c
Bits 24 - 31 of 32 bit User Term Holdover History
User accumulated history for T4 relative to the TCXO. Resolution is 0.745x10-3 ppb.
Default value: 0.
T4_HO_Ramp, 0x4d (R/W)
Address
0x4d
Bit7
Bit6
Bit5
Bit4
Not used Long term History bandwidth
Holdover bandwidth and ramp controls for T4:
Bit3
Bit2
Short term History band-
width
0x30, bits 6 ~ 4
000
001
010
Long term
History
Bandwidth, mHz
9.7 mHz
4.9 mHz
2.4 mHz
Bit1
Bit0
Bit1
Bit0
Ramp control
Data Sheet #: TM084 Page 35 of 44 Rev: P02 Date: 12/5/06
© Copyright 2006 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice