STC4130 Datasheet, PDF (23/44 Pages) List of Unclassifed Manufacturers – Synchronous Clock for SETS

CS
WRB
RDB
A
AD
RDY
STC4130
Synchronous Clock for SETS
Data Sheet
t_WRBs
t_WRB
t_WRB1
t_WRBh
t_As
t_RDYd1
t_Ah
Address
t_Ds
t_Dh
Data
t_RDYd2
t_RDY
t_RDYh
t_RDYd3
Figure 14: Intel Write Read Timing
Table 9: Intel Bus Write Timing
Symbol
t_WRBs
t_WRB
t_WRBh
t_WRB1
t_As
t_Ah
t_Ds
t_Dh
t_RDYd1
t_RDYd2
t_RDY
t_RDYh
t_RDY3
Description
Write setup time
Write low time
Write hold time
Time between consecutive writes
Address setup
Address hold
Data setup time before CS high
Data hold time after CS high
CS low to RDY high delay
RDB low to RDY low
RDY low time
RDB hold after RDY high
RDY high-z delay after CS high
Min
Max
Unit
0
nS
40
nS
0
nS
50
nS
10
nS
0
nS
10
nS
10
nS
13
nS
40
nS
50
nS
0
nS
10
nS
Data Sheet #: TM084 Page 23 of 44 Rev: P02 Date: 12/5/06
© Copyright 2006 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice