NT68P61A Datasheet, PDF (24/48 Pages) List of Unclassifed Manufacturers – 8-Bit Microcontroller for Monitor (24K OTP ROM Type)

NT68P61A
12.2. Port1: P10 - P16
Port10-Port15 are 6-bit bi-directional CMOS I/O ports
with PMOS as the internal pull-up (Figure 6). Port16 is
an input pin only. Each bi-directional I/O pin may be bit
programmed as an input or output port without software
controlling the data direction register. When Port1 works
as output, the data to be output is latched to the port
data register and output to the pin. Port1 pins that have
'1's written to them are pulled high after reset.
P10, P11 are shared with AD0 & AD1 input pins
respectively. If user clears the ENADX bit in the ENDAC
control register to low, A/D converters will activate
simultaneously. After the chip is reset, ENADX bits enter
HIGH state and P10, P11 act as I/O pins.
P12, P13 are shared with half signals input and output
pins by accessing SYNCON control register. If user
clears the ENHALF bit to low, P13 will switch to HALFHI
pin (input pin) and P12 will switch to HALFHO pin
(output pin, Figure 8). Refer to half frequency function in
the H/V sync processor paragraph concerning HALFHI &
HALFHO pin. After the chip is reset, the ENHALF bits
will enter HIGH state and P12, P13 will act as I/O pins.
P16 has a Schmitt Trigger input buffer (Figure 9) and is
shared with the external interrupt pin if set the IEINTE bit
in IEX control register. Refer to 'Interrupt Controller'
section above for function details.
Addr. Register INIT Bit7
Bit6
$0001
PT1
7FH
-
P16
$000C ENDAC FFH ENAD1 ENAD0
$000D AD0 REG C0H CEND
CSTA
$000E AD1 REG 00H
-
-
$000F
IEX
00H
-
-
Bit5
P15
ENDK13
AD05
Bit4
P14
ENDK12
AD04
Bit3
Bit2
P13
P12
ENDK11 ENDK10
AD03
AD02
AD15
IEINTS
AD14
IEINTD
AD13
IEINTA
AD12
IEINTR
Bit1
P11
ENDK9
AD01
AD11
IEINTE
Bit0
P10 RW
ENDK8 W
AD00
R
W
AD10
R
IEINTV W
Vcc
Data Input
Vcc
Data Out
I/P
Data OE
.
I/O
Figure 9. Schmitt Input Structure
Data In
Figure 10. I/O Structure
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