NT68P61A Datasheet, PDF (12/48 Pages) List of Unclassifed Manufacturers – 8-Bit Microcontroller for Monitor (24K OTP ROM Type)

NT68P61A
OTP ROM Mega cell Mode Selection
RESET = 12.75V, OSCI = VIL, ^{Mode [0..2]}
Mode
CE
P16 = VIH, DAC0 = VIL
not VPP
---
Normal Operating
-
VPP
000
Output Disable
-
VPP
VPP
VPP
VPP
000
Program
VIH
000
Program Verify
VIH
000
Program Inhibit (Standby)
VIL
001
Security (Program)
VIH
VPP
010
Word-line Stress
-
VPP
011
Bit-line Stress
-
VPP
100
OTP Row (after pkg)
VIH
VPP
101
OTP Column (after pkg)
VIH
OE
VPP
DB0 -
DB7
-
-
-
VIH
-
high-Z
VIH
VPP
data in
VIL
VPP data out
-
VPP
high-Z
-
VPP
data in
-
VPP
-
-
VPP
"0"
VIH
VPP
data in
VIH
VPP
data in
* The security byte is at address $0000.
READ
NT68P61A's OTP ROM mega cell has 2 control pins. CE
(Chip Enable) controls the operation power and is used
for device selection. The OE (Output Enable) controls
the output buffers.
OUTPUT DISABLE
If OE = VIH, the outputs will be in a high impedance
state. Two or more ROMs can be connected together on
a common bus.
STANDBY
By applying a low power level to the CE input, the chip
enters STANDBY reducing the operating current to
100µA.
PROGRAM
Initially, all bits are in "1" state which is the erased state.
The program operation is to introduce "0" data into the
desired bit locations by electrical programming. When
the VPP input is at 12.75V and CE is at VIH, the chip
enters the PROGRAMMING mode.
PROGRAM VERIFY
The VERIFY mode is to check if the desired data is
correctly programmed on the programmed bit. The
VERIFY is accomplished with CE at VIH, VPP input is at
12.75V, and OE = VIL.
PROGRAM INHIBIT
Using this mode, programming of two or more OTP
ROMs in parallel with different data is accomplished. All
inputs except for CE and OE may be commonly
connected, and a TTL high level program pulse is
applied to the CE of the desired device only and TTL
high level signal is applied to the other devices.
12