MB8117800A-60 Datasheet, PDF (18/27 Pages) List of Unclassifed Manufacturers – 2 M X 8 BIT FAST PAGE MODE DYNAMIC RAM

MB8117800A-60/-70
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Fig. 10 – FAST PAGE MODE EARLY WRITE CYCLE (OE = “H” or “L”)
VIH
RAS _VIL
tCRP
tRASP
tRCD
tCSH
tCAS
tPC
tCP
tCAS
tRP
tRSH
tCAS
VIH
CAS _VIL
A0 to A10 ^VIH
VIL
tAR
tRAH
tASR
ROW
ADD
tCAH
tASC
COL
ADD
tASC
tCAH
COL
ADD
tASC
tCAH
COL
ADD
VIH
WE
VIL
tWCR
tWCS
tWCH
tWCS
tWCH
tWCS
tWCH
tDHR
tDH
tDS
tDS
tDH
tDS
tDH
DQ VIH
(Input) _VIL
VALID
DATA
VALID
DATA
VALID
DATA
DQ VOH
(Output) _VOL
HIGH-Z
“H” or “ L”
DESCRIPTION
The fast page mode early write cycle is executed in the same manner as the fast page mode read cycle except the states of WE and
OE are reversed. Data appearing on the DQ pins is latched on the falling edge of CAS and written into memory. During the fast page
mode early write cycle, including the delayed (OE) write and read-modify-write cycles, tCWL must be satisfied.
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