MB8117800A-60 Datasheet, PDF (16/27 Pages) List of Unclassifed Manufacturers – 2 M X 8 BIT FAST PAGE MODE DYNAMIC RAM

MB8117800A-60/-70
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Fig. 8 – READ-MODIFY-WRITE CYCLE
VIH
RAS
VIL
VIH
CAS
VIL
A0 to A10 ^VIH
VIL
VIH
WE
VIL
DQ ^VIH
(Input) VIL
DQ ^VOH
(Output) VOL
VIH
OE
VIL
tRWC
tRAS
tAR
tCRP
tRCD
tASR
tRAD
tRAH
tASC
tCAH
ROW
ADD
tRCS
COL
ADD
tRWD
tAWD
tCWD
tCWL
tRWL
tDZC
tRAC
HIGH-Z
tDZO
tOED
tCAC
tAA
tDS
tWP
tDH
VALID
DATA IN
tON
tOEA
tON
VALID
tOEZ
tOEH
tOH
tRP
HIGH-Z
“H” or “L”
DESCRIPTION
The read-modify-write cycle is executed by changing WE from High to Low after the data appears on the DQ pins. In the read-modify-
write cycle, OE must be changed from Low to High after the memory access time.
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