SED1520D0A Datasheet, PDF (11/52 Pages) List of Unclassifed Manufacturers – DOT MATRIX LCD DRIVER

2.0 Block Diagrams
2.3.2 – 2.3.6
2.3.2 Busy Flag
Busy flag being “1” means that the SED1520 is performing its internal operation and any instruction
other than Read Status is disabled. The busy flag is output to pin D7 by a Read Status instruction.
As long as the cycle time (tCYC) requirement is met, the flag need not be checked before each com-
mand and this dramatically improves the MPU performance.
2.3.3 Display Start Line Register
This register is a pointer which determines the start line corresponding to COM0 (normally, the up-
permost line of display) for display of data in the display data RAM. It is used for scrolling the dis-
play or changing the page from one to another. Executing the Set Display Start Line command
sets 5 bits of display start address in this register. Its content is preset in the line counter at each
timing the FR signal changes. The line counter is incremented synchronously to a CL input, thus
generating a line address for sequential reading of 80 bits of data from the display data RAM to the
LCD driver circuit.
2.3.4 Column Address Counter
The column address counter is a 7–bit presettable counter which gives column addresses of the
display data RAM as shown in Fig. 2.3.8.1. When a Read/Write Display Data command comes in,
the counter is incremented by 1. For any nonexisting address over 50H, the counter is locked and
not incremented.
The column address counter is independent from the page register.
2.3.5 Page Register
This register gives a page address of the display data RAM as shown in Fig. 2.3.8.1. The Set Page
Address command permits the MPU to access a new page of the display data RAM.
2.3.6 Display Data RAM
Dot data for display is stored in this RAM. Since the MPU and LCD driver circuit operate indepen-
dently of each other, data can be changed asynchronously without adverse effect on the display.
One bit of the display data RAM is assigned to one bit of LCD:
LCD on = “1”
LCD off = “0”
The ADC command inverts the assignment relationship between a display data RAM column ad-
dress and a segment output (see Fig. 2.3.8.1).
371-1.0 S-MOS Systems, Inc. • 150 River Oaks Parkway • San Jose, CA 95134 • Tel: [phone] • Fax: [phone]