M12L64322A2U Datasheet, PDF (7/46 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 32 Bit x 4 Banks

ESMT
M12L64322A (2U)
AC CHARACTERISTICS (AC operating condition unless otherwise noted)
Parameter
-5
-6
-7
Symbol
Unit
Min Max Min Max Min Max
CLK cycle time
CAS latency = 3
tCC
CAS latency = 2
5
6
7
1000
1000
1000
ns
10
10
10
CLK to valid
output delay
CAS latency = 3
tSAC
CAS latency = 2
4.5
5.5
6
6
6
ns
6
Output data
CAS latency = 3
2
2
2
tOH
ns
hold time
CAS latency = 2
2
2
2
CLK high pulse width
tCH
2
2.5
2.5
ns
CLK low pulse width
tCL
2
2.5
2.5
ns
Input setup time
tSS
1.5
1.5
2
ns
Input hold time
tSH
1
1
1
ns
CLK to output in Low-Z
tSLZ
1
1
1
ns
CLK to output
in Hi-Z
CAS latency = 3
tSHZ
CAS latency = 2
4.5
5.5
6
6
6
ns
6
Note:
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.
3. Assumed input rise and fall time (tr & tf) =1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered.
i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.
Note
1
1,2
2
3
3
3
3
2
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2010
Revision: 1.0
7/46