M12L64322A2U Datasheet, PDF (5/46 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 32 Bit x 4 Banks

ESMT
M12L64322A (2U)
DC CHARACTERISTICS
Recommended operating condition unless otherwise noted，TA = 0 to 70 °C
Parameter
Operating Current
(One Bank Active)
Precharge Standby Current
in power-down mode
Precharge Standby Current
in non power-down mode
Active Standby Current
in power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
Symbol
ICC1
ICC2P
ICC2PS
ICC2N
ICC2NS
ICC3P
ICC3PS
ICC3N
ICC3NS
Test Condition
CAS
Latency
Version
Unit
-5 -6 -7
Burst Length = 1
tRC ≥ tRC(min)
IOL = 0 mA
180 _{160 140} mA
CKE ≤ VIL(max), t_CC = 15ns
CKE & CLK ≤ VIL(max), t_CC = ∞
2
mA
2
CKE ≥ VIH(min), CS ≥ VIH(min), t_CC = 15ns
30
Input signals are changed one time during 30ns
mA
CKE ≥ VIH(min), CLK ≤ VIL(max), t_CC = ∞
input signals are stable
10
CKE ≤ VIL(max), t_CC = 15ns
CKE & CLK ≤ VIL(max), t_CC = ∞
10
mA
10
CKE ≥ VIH(min), CS ≥ VIH(min), tCC=15ns
Input signals are changed one time during 2clks
40
mA
All other pins ≥ VDD-0.2V or ≤ 0.2V
CKE ≥ VIH(min), CLK ≤ VIL(max), t_CC = ∞
input signals are stable
10
mA
Note
1,2
Operating Current
(Burst Mode)
Refresh Current
Self Refresh Current
ICC4
I_OL = 0 mA
Page Burst
2 Banks activated
ICC5
tRC ≥ tRC(min)
ICC6
CKE ≤ 0.2V
3
280 250 220
mA 1,2
2
220 200 180
330 310 285 mA
2
mA
Note: 1. Measured with outputs open.
2. Input signals are changed one time during 2 CLKS.
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2010
Revision: 1.0
5/46