M12L64322A2U Datasheet, PDF (29/46 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 32 Bit x 4 Banks

ESMT
M12L64322A (2U)
Note: 1. All input expect CKE & DQM can be don’t care when CS is high at the CLK high going edge.
2. Bank active @ read/write are controlled by BA0~BA1.
BA1
0
0
1
1
BA0
0
1
0
1
Active & Read/Write
Bank A
Bank B
Bank C
Bank D
3. Enable and disable auto precharge function are controlled by A10/AP in read/write command
A10/AP
0
1
BA1
0
0
1
1
0
0
1
1
BA0
Operating
0 Disable auto precharge, leave A bank active at end of burst.
1 Disable auto precharge, leave B bank active at end of burst.
0 Disable auto precharge, leave C bank active at end of burst.
1 Disable auto precharge, leave D bank active at end of burst.
0 Enable auto precharge, precharge bank A at end of burst.
1 Enable auto precharge, precharge bank B at end of burst.
0 Enable auto precharge, precharge bank C at end of burst.
1 Enable auto precharge, precharge bank D at end of burst.
4. A10/AP and BA0~BA1 control bank precharge when precharge is asserted.
A10/AP BA1 BA0
0
0
0
0
0
1
0
1
0
0
1
1
1
X
X
Precharge
Bank A
Bank B
Bank C
Bank D
All Banks
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2010
Revision: 1.0
29/46