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M12L16161A Datasheet, PDF (4/27 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 16Bit x 2Banks Synchronous DRAM
M12L16161A
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70 °C VIH(min)/VIL(max)=2.0V/0.8V)
Parameter
Symbol
Test Condition
CAS
Version
Latency -4.3 -5 -5.5 -6 -7 -8 Unit Note
Operating Current
(One Bank Active)
ICC1
Burst Length = 1
tRC ≥ tRC (min), tCC ≥ tCC (min), IOL= 0mA
250 230 210 190 160 140 mA
1
Precharge Standby
ICC2P CKE ≤ VIL(max), tCC =15ns
Current in power-down
mode
ICC2PS CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
2
mA
2
Precharge Standby
Current in non power-
down mode
ICC2N CKE ≥ VIH(min), CS ≥ VIH(min), tCC =15ns
Input signals are changed one time during 30ns
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
30
mA
2
mA
Active Standby Current ICC3P CKE ≤ VIL(max), tCC =15ns
10
mA
in power-down mode ICC3PS CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
10
Active Standby Current
in non power-down
mode
(One Bank Active)
ICC3N
ICC3NS
CKE ≥ VIH(min), CS ≥ VIH(min), tCC=15ns
Input signals are changed one time during 30ns
CKE ≥ VIH (min), CLK ≤ VIL(max), tCC= ∞
Input signals are stable
40
mA
10
mA
Operating Current
(Burst Mode)
ICC4
IOL= 0Ma, Page Burst
All Band Activated, tCCD = tCCD
3 270 250 230 210 180 160 mA 1
(min)
2 270 250 230 210 180 160
Refresh Current
ICC5 tRC ≥ tRC(min)
270 250 230 210 180 160 mA 2
Self Refresh Current ICC6 CKE ≤ 0.2V
1
mA
Note: 1.Measured with outputs open. Addresses are changed only one time during tCC(min).
2.Refresh period is 32ms. Addresses are changed only one time during tCC(min).
Elite Semiconductor Memory Technology Inc.
P.4
Publication Date : Jan. 2000
Revision : 1.3u