M13S2561616A_1 Datasheet, PDF (3/49 Pages) Elite Semiconductor Memory Technology Inc. – 4M x 16 Bit x 4 Banks Double Data Rate SDRAM

ESMT
Functional Block Diagram
CLK
CLK
CKE
Clock
Generator
Address
Mode Register &
Extended Mode
Register
Row
Address
Buffer
&
Refresh
Counter
CS
RAS
CAS
WE
Column
Address
Buffer
&
Refresh
Counter
M13S2561616A
Operation Temperature Condition -40~85°C
Bank D
Bank C
Bank B
Bank A
Sense Amplifier
Column Decoder
Data Control Circuit
DM
DQ
Pin Arrangement
CLK, CLK
DLL
DQS
DQS
x16
VDD ₁
DQ0 2
VDDQ 3
DQ1 4
DQ2 5
VSSQ 6
DQ3 7
DQ4 8
VDDQ 9
DQ5 10
DQ6 11
VSSQ 12
DQ7 ₁₃
NC 14
VDDQ 15
LDQS 16
NC 17
VDD 18
NC 19
LDM 20
WE ₂₁
CAS 22
RAS 23
CS 24
NC ₂₅
BA0 26
BA1 27
A10/AP 28
A0
29
A1
30
A2
31
A3
32
VDD ₃₃
66 PIN TSOP(II)
(400mil x 875mil)
(0.65 mm PIN PITCH)
Elite Semiconductor Memory Technology Inc.
x16
66 VSS
65 DQ15
64 VSSQ
63 DQ14
62 DQ13
61
VDDQ
60 DQ12
59 DQ11
58 VSSQ
57 DQ10
56 DQ9
55 VDDQ
54 DQ8
53 _NC
52 VSSQ
51 UDQS
50 NC
49
VREF
48 VSS
47 UDM
46 CLK
45 CLK
44 CKE
43 NC
42 A12
41
A11
40 A9
39 A8
38 A7
37 _A6
36 A5
35 A4
34 VSS
Publication Date : Dec. 2007
Revision : 1.1
3/49