M13S5121632A Datasheet, PDF (27/47 Pages) Elite Semiconductor Memory Technology Inc. – 8M x 16 Bit x 4 Banks Double Data Rate SDRAM

ESMT
M13S5121632A
Current State
CS RAS CAS WE
HXXX
L HHH
L HH L
Address
X
X
BA
L H L H BA, CA, A10
Command
DESEL
NOP
Burst Stop
READ/READA
WRITE
L
H
L
L BA, CA, A10
WRITE/WRITEA
L
L
H
H BA, RA
Active
L
L
H
L BA, A10
PRE / PREA
L
L
L
HX
Refresh
L
L
L
L Op-Code Mode-Add MRS
H X X XX
DESEL
L H H HX
NOP
L H H L BA
Burst Stop
READ with
L H L H BA, CA, A10
AUTO
L
H
L
L BA, CA, A10
PRECHARGE
L
L
H
H BA, RA
READ
WRITE
Active
L
L
H
L BA, A10
PRE / PREA
L
L
L
HX
Refresh
L
L
L
L Op-Code Mode-Add MRS
H X X XX
DESEL
L H H HX
NOP
L H H L BA
Burst Stop
L H L H BA, CA, A10
WRITE with
AUTO
L
H
L
L BA, CA, A10
PRECHARGE
L
L
H
H BA, RA
READ
WRITE
Active
L
L
H
L BA, A10
PRE / PREA
L
L
L
HX
Refresh
L
L
L
L Op-Code Mode-Add MRS
Action
NOP (Continue Burst to end)
NOP (Continue Burst to end)
ILLEGAL
Terminate Burst With DM=High,
Latch CA, Begin Read, Determine
Auto-Precharge*3
Terminate Burst, Latch CA,
Begin new Write, Determine
Auto-Precharge*3
Bank Active/ILLEGAL*2
Terminal Burst With DM=High,
Precharge
ILLEGAL
ILLEGAL
NOP (Continue Burst to end)
NOP (Continue Burst to end)
ILLEGAL
READ*7
ILLEGAL
Bank Active/ILLEGAL*2
ILLEGAL*2
ILLEGAL
ILLEGAL
NOP (Continue Burst to END)
NOP (Continue Burst to END)
ILLEGAL
ILLEGAL
Write
Bank Active/ILLEGAL*2
ILLEGAL*2
ILLEGAL
ILLEGAL
Elite Semiconductor Memory Technology Inc.
Publication Date : Oct. 2008
Revision : 1.0
27/47