GD25Q128C Datasheet, PDF (20/69 Pages) ELM Electronics – 128M-bit Serial Flash

GD25Q128CxIGx 3.3V Uniform Sector Dual and Quad Serial Flash
http://www.elm-tech.com
Figure 5a. Write Enable for Volatile Status Register Sequence Diagram (QPI)
CS#
SCLK
IO₀
IO₁
IO₂
IO₃
01
Command
50H
7.4. Read Status Register (RDSR) (05H or 35H or 15H)
The Read Status Register (RDSR) command is for reading the Status Register. The Status Register may be read
at any time, even while a Program, Erase or Write Status Register cycle is in progress. When one of these cycles
is in progress, it is recommended to check the Write In Progress (WIP) bit before sending a new command to
the device. It is also possible to read the Status Register continuously. For command code “05H”/“35H”/“15H”,
the SO will output Status Register bits S7~S0 / S15~S8 / S16~S23.
Figure 6. Read Status Register Sequence Diagram
CS#
SCLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Command
SI
05H or 35H or 15H
SO
High-Z
Register0/1/2
Register0/1/2
76543210765432107
MSB
MSB
Figure 6a. Read Status Register Sequence Diagram (QPI)
CS#
SCLK
IO₀
012345
Command
05H/35H/15H
40 4 04
IO₁
51 515
IO₂
6262 6
IO₃
7 3 7 37
Register0/1/2
69 - 20
Rev.1.2