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GD25Q128C Datasheet, PDF (13/69 Pages) ELM Electronics – 128M-bit Serial Flash
GD25Q128CxIGx 3.3V Uniform Sector Dual and Quad Serial Flash
7. COMMANDS DESCRIPTION
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All commands, addresses and data are shifted in and out of the device, beginning with the most significant bit
on the first rising edge of SCLK after CS# is driven low. Then, the one-byte command code must be shifted in
to the device, most significant bit first on SI, each bit being latched on the rising edges of SCLK.
See Table7.1., every command sequence starts with a one-byte command code. Depending on the command,
this might be followed by address bytes, or by data bytes, or by both or none. CS# must be driven high after
the last bit of the command sequence has been shifted in. For the command of Read, Fast Read, Read Status
Register or Release from Deep Power-Down, and Read Device ID, the shifted-in command sequence is followed
by a data-out sequence. CS# can be driven high after any bit of the data-out sequence is being shifted out.
For the command of Page Program, Sector Erase, Block Erase, Chip Erase, Write Status Register, Write
Enable, Write Disable or Deep Power-Down command, CS# must be driven high exactly at a byte boundary,
otherwise the command is rejected, and is not executed. That is CS# must driven high when the number of clock
pulses after CS# being driven low is an exact multiple of eight. For Page Program, if at any time the input byte
is not a full byte, nothing will happen and WEL will not be reset.
Table 7.1. Commands (Standard/Dual/Quad SPI)
Command Name Byte 1 Byte 2
Byte 3
Byte 4 Byte 5 Byte 6 n-Bytes
Write Enable
06H
Write Disable
04H
Volatile SR Write Enable 50H
Read Status Register-1 05H (S7-S0)
Read Status Register-2 35H (S15-S8)
Read Status Register-3 15H (S23-S16)
Write Status Register-1 01H (S7-S0)
Write Status Register-2 31H (S15-S8)
Write Status Register-3 11H (S23-S16)
Read Data
03H A23-A16
Fast Read
0BH A23-A16
Dual Output Fast Read 3BH A23-A16
Dual I/O Fast Read
BBH A23-A8 (2)
Quad Output Fast Read
Quad I/O Fast Read
Quad I/O Word Fast
Read (7)
Page Program
Quad Page Program
Sector Erase
Block Erase (32K)
Block Erase (64K)
Chip Erase
Enable QPI
Enable Reset
Reset
6BH A23-A16
EBH
A23-A0
M7-M0 (4)
E7H
A23-A0
M7-M0 (4)
02H A23-A16
32H A23-A16
20H A23-A16
52H A23-A16
D8H A23-A16
C7/60H
38H
66H
99H
A15-A8
A15-A8
A15-A8
A7-A0
M7-M0 (2)
A15-A8
dummy (5)
dummy (6)
A15-A8
A15-A8
A15-A8
A15-A8
A15-A8
(continuous)
(continuous)
A7-A0
A7-A0
A7-A0
(D7-D0) (1)
A7-A0
(D7-D0) (3)
(D7-D0) (Next byte) (continuous)
dummy (D7-D0) (continuous)
dummy D7-D0 (1) (continuous)
(continuous)
dummy (D7-D0) (3) (continuous)
(continuous)
(D7-D0) (3)
(continuous)
A7-A0
A7-A0
A7-A0
A7-A0
A7-A0
(D7-D0) Next byte
(D7-D0) (3)
69 - 13
Rev.1.2