MA28140 Datasheet, PDF (4/72 Pages) Dynex Semiconductor – Packet Telecommand Decoder

MA28140
3. PTD ARCHITECTURAL OVERVIEW
Figure 2 describes the PTD functional architecture which
features 7 major blocks described below. Figure 3 shows the
CCSDS protocol layer architecture. The PTD deals with the
Coding Layer, the Transfer Layer, the Authentication Layer,
the Segmentation Layer and a part of the Packetisation Layer
of the CCSDS protocol.
CODING LAYER BLOCK
The coding layer block multiplexes the 6 physical TC
channel inputs and fulfils the coding layer function described in
section 5 of ref.1.
The main tasks performed by the PTD at this level are:
• Start sequence detection and selection of the first active
TC input.
• Codeblock error detection and correction.
• Valid codeblock transfer to the above layer.
• Generation of part of the FAR and CLCW status.
TRANSFER LAYER BLOCK
This level is concerned with the processing of the frames
received from the coding layer and fulfils the transfer layer
function described in section 6 of ref.1.
At this level, the PTD performs the following tasks:
• Clean frame validation.
• Legal frame validation.
• Frame analysis report mechanism.
• Reporting word (16 bit CLCW and part of 32 bit FAR)
generation.
AUTHENTICATION UNIT BLOCK
This block (which is optional and can be disabled
permanently or during flight) is concerned with the segment
data protection, it enables the spacecraft to authenticate the
received data. The authentication concept is the “plain text
with appended signature” approach, described in Section 8 of
ref. 2.
In the PTD architecture this function is implemented on
chip. However, a specific interface allows authentication to be
performed externally - if another coding algorithm is to be
used, the on-chip block can be disabled and an external
authentication system can be used.
The block generates a reporting word (Authentication
Status = 80 bits) and part of the 32 bit FAR.
SEGMENTATION LAYER BLOCK
This block implements only some of the segmentation
layer functions described in section 7 of ref.1. Its purpose is to
manage the back-end buffer shared with the FARM-1 block of
the transfer layer and to implement the MAP interface in order
to demultiplex (with external hardware) the segments
dedicated to the different spacecraft applications.
EXTERNAL BUS
6447448
DATA CTL AD
8
11
BUS
CONTROLLER
FAR28...30 AUS0...79
AUTHENTICATION
UNIT
CLCW
CPDUS
FAR
AUS
TELEMETRY
MODULE
TM interface
adr
control
data
INTERNAL BUS
CLK
DATA
ACTIVE
6
6
CODING LAYER
6
BLOCK
FAR7...12
FAR13...15
FAR18...20
CLEAN FRAME
VALIDATION
BLOCK
LEGAL FRAME
VALIDATION
BLOCK
TRANSFER LAYER
FARM-1
BLOCK
SEGMENTATION
LAYER BLOCK
COMMAND PULSE
DISTRIBUTION
UNIT
FAR1...3
FAR4...6
FAR16,17
FAR1...3
CLCW0...15
Figure 2: PTD Internal Architecture
FAR21...26
MAP interface
CPDUS0...15
4/72