MA28140 Datasheet, PDF (38/72 Pages) Dynex Semiconductor – Packet Telecommand Decoder

MA28140
RAM
Buffer0-(front end/back end) (see note 1)
Buffer1-(back end/front end) (see note 1)
Programmable key - Knapsack
Programmable key - Hashing
Internal use (reserved)
Free
8 LSB of Recovery LAC
Internal use (reserved)
Auxiliary LAC Counter - octet 4 LSB
Auxiliary LAC Counter - octet 3
Auxiliary LAC Counter - octet 2
Auxiliary LAC Counter - octet 1 MSB
Principal LAC Counter - octet 4 LSB
Principal LAC Counter - octet 3
Principal LAC Counter - octet 2
Principal LAC Counter - octet 1 MSB
Free
AUS octet 10 - buffer 0
AUS octet 9 - buffer 0
AUS octet 8 - buffer 0
AUS octet 7 - buffer 0
AUS octet 6 - buffer 0
AUS octet 5 - buffer 0
AUS octet 4 - buffer 0
AUS octet 3 - buffer 0
AUS octet 2 - buffer 0
AUS octet 1 - buffer 0
FAR octet 4 - buffer 0
FAR octet 3 - buffer 0
FAR octet 2 - buffer 0
FAR octet 1 - buffer 0
Free
AUS octet 10 - buffer 1
AUS octet 9 - buffer 1
AUS octet 8 - buffer 1
AUS octet 7 - buffer 1
AUS octet 6 - buffer 1
AUS octet 5 - buffer 1
AUS octet 4 - buffer 1
AUS octet 3 - buffer 1
AUS octet 2 - buffer 1
AUS octet 1 - buffer I
FAR octet 4 - buffer 1
FAR octet 3 - buffer 1
FAR octet 2 - buffer 1
FAR octet 1 - buffer 1
Free
CPDU buffer (see note 2)
Free
S tart Addre ss
000
100
200
368
370
374
400
401
402
403
404
405
406
407
408
409
40A
410
411
412
413
414
415
416
417
418
419
41A
41B
41C
41D
41E
430
431
432
433
434
435
436
437
438
439
43A
43B
43C
43D
43E
600
700
E nd Addre ss
0FF
1FF
367
36F
373
3FF
400
401
402
403
404
405
406
407
408
409
40F
410
411
412
413
414
415
416
417
418
419
41A
41B
41C
41D
42F
430
431
432
433
434
435
436
437
438
439
43A
43B
43C
43D
5FF
6FF
7FF
Note 1: The addresses 000 and 100 contain the buffer length (X) and the first word of the
frame are stored at address X and 100+X respectively; the last word is stored at address
001 and 101 respectively.
Note 2: The address 600 contains the CPDU buffer length (X) and the first word of the frame
is stored at address 600+X, the last word is stored at address 601.
Table 5: RAM Mapping
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