DS80C390_05 Datasheet, PDF (13/53 Pages) Dallas Semiconductor – Dual CAN High-Speed Microprocessor

DS80C390 Dual CAN High-Speed Microprocessor
ELECTRICAL CHARACTERISTICS—(NONMULTIPLEXED ADDRESS/DATA BUS)
(Note 13)
PARAMETER
Oscillator Frequency
PSEN Pulse Width
SYMBOL CONDITIONS
1 / t_CLCL
t_PLPH
External oscillator
External crystal
40MHz
MIN MAX
0 40
1 40
VARIABLE CLOCK
MIN
MAX
0
40
1
40
0.5 t_MCS - 8
UNITS
MHz
ns
PSEN Low to Valid Instruction In
t_PLIV
0.5 t_MCS - 20
ns
Input Instruction Hold After PSEN
Input Instruction Float After PSEN
Port 1 Address, Port 4 CE to Valid
Instruction In
Port 2, 4 Address to Valid Instruction
In
t_PXIX
t_PXIZ
t_AVIV1
t_AVIV2
0
0
ns
See MOVX
Characteristics
ns
0.75 t_MCS - 22 ns
0.875 t_MCS - 30 ns
Note 13:
All parameters apply to both commercial and industrial temperature operation unless otherwise noted. The value t_MCS is a function of
the machine cycle clock in terms of the processor’s input clock frequency. These relationships are described in the Stretch Value
Timing table. All signals characterized with load capacitance of 80pF except Port 0, ALE, PSEN, RD, and WR with 100pF. Interfacing
to memory devices with float times (turn off times) over 25ns can cause bus contention. This does not damage the parts, but causes
an increase in operating current. Specifications assume a 50% duty cycle for the oscillator. Port 2 and ALE timing changes in relation
to duty cycle variation. Some AC timing characteristic drawings contain references to the CLK signal. This waveform is provided to
assist in determining the relative occurrence of events and cannot be used to determine the timing of signals relative to the external
clock.
Figure 13. Nonmultiplexed External Program Memory Read Cycle
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