BCM43353LIUBGT Datasheet, PDF (86/143 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/Radio with Integrated Bluetooth 4.1 for Automotive and Industrial Applications

BCM43353 Data Sheet
WLAN GPIO Signals and Strapping Options
WLAN GPIO Signals and Strapping Options
The pins listed in Table 16 are sampled at power-on reset (POR) to determine the various operating modes.
Sampling occurs a few milliseconds after an internal POR or deassertion of the external POR. After the POR,
each pin assumes the GPIO or alternative function specified in the signal descriptions table. Each strapping
option pin has an internal pull-up (PU) or pull-down (PD) resistor that determines the default mode. To change
the mode, connect an external PU resistor to VDDIO or a PD resistor to GND, using a 10 kΩ resistor or less.
Note: Refer to the reference board schematics for more information.
Table 16: WLAN GPIO Functions and Strapping Options
Pin Name
GPIO_7
GPIO_8
SDIO_CLK
SDIO_DATA_2
WLBGA
Pin #
D4
H1
B11
D10
a. See Table 17 and Table 18.
Default
Function
1
0
1
1
Description
SDIO_SEL^a
SDIO_PADVDDIO
CPU-LESS^a
SPI_SEL^a
SDIO_SEL
1
1
0
0
0
SPI_SEL
X
X
1
1
0
Table 17: SDIO/gSPI I/O Voltage Selection
SDIO_PADVDDIO
0
1
0
1
X
Mode
1.8V I/O
3.3V I/O
1.8V I/O
3.3V I/O
3.3V I/O
SDIO_SEL
1
0
0
0
Table 18: Host Interface Selection (WLBGA Package)
SPI_SEL
X
1
0
0
CPULESS
X
X
0
1
Mode
SDIO Mode (3.3V or 1.8V I/O)
gSPI Mode (3.3V or 1.8V I/O)
Unsupported
Unsupported
Broadcom^®
November 14, 2014 • 43353-DS104-R
Page 85