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BCM43353LIUBGT Datasheet, PDF (133/143 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/Radio with Integrated Bluetooth 4.1 for Automotive and Industrial Applications
BCM43353 Data Sheet
Data Timing, DDR50 Mode
Figure 41: SDIO Data Timing (DDR50 Mode)
FPP
SDIO_CLK
DAT[3:0]
input
Invalid
tISU2x
tIH2x
Data
Invalid
tISU2x
tIH2x
Data
Invalid
SDIO/gSPI Timing
Data
Invalid
DAT[3:0]
output
tODLY2x
(min)
Data
tODLY2x (max)
tODLY2x
(min)
Data
tODLY2x (max)
Available timing
window for card
output transition
Data
In DDR50 mode, DAT[3:0] lines are sampled on both edges of
the clock (not applicable for CMD line)
Available timing
window for host to
sample data from card
Parameter
Input CMD
Input setup time
Input hold time
Output CMD
Output delay time
Output hold time
Input DAT
Input setup time
Input hold time
Output DAT
Output delay time
Output hold time
Table 51: SDIO Bus Timing Parameters (DDR50 Mode)
Symbol
Minimum Maximum Unit Comments
tISU
6
tIH
0.8
tODLY
–
tOH
1.5
tISU2x
3
tIH2x
0.8
tODLY2x
–
tODLY2x
1.5
–
–
13.7
–
–
–
7.0
–
ns CCARD < 10pF (1 Card)
ns CCARD < 10pF (1 Card)
ns CCARD < 30pF (1 Card)
ns CCARD < 15pF (1 Card)
ns CCARD < 10pF (1 Card)
ns CCARD < 10pF (1 Card)
ns CCARD < 25pF (1 Card)
ns CCARD < 15pF (1 Card)
Broadcom®
November 14, 2014 • 43353-DS104-R
Page 132