BCM43362SKUBGT Datasheet, PDF (46/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ b/g/n MAC/Baseband/Radio + SDIO

BCM43362 Data Sheet
WLAN Software Architecture
Section 8: WLAN Software Architecture
Host Software Architecture
The host driver (DHD) provides a transparent connection between the host operating system and the
BCM43362 media (for example, WLAN) by presenting a network driver interface to the host operating system
and communicating with the BCM43362 over an interface-specific bus (SPI, SDIO, and so on) to:
• Forward transmit and receive frames between the host network stack and the BCM43362 device, and
• Pass control requests from the host to the BCM43362 device, returning the BCM43362 device responses
The driver communicates with the BCM43362 over the bus using a control channel and a data channel to pass
control messages and data messages. The actual message format is based on the BDC protocol.
Device Software Architecture
The wireless device, protocol, and bus drivers are run on the embedded ARM® processor using a Broadcom-
defined operating system called HNDRTE, which transfers data over a propriety Broadcom format over the
SDIO/SPI interface between the host and device (BDC/LMAC). The data portion of the format consists of
IEEE 802.11 frames wrapped in a Broadcom encapsulation. The host side architecture provides all missing
functionality between a network device and the Broadcom device interface. The host can also be customized to
provide functionality between the Broadcom device interface and a full network device interface.
This transfer requires a message-oriented (framed) interconnect between the host and device. The SDIO bus
is an addressed bus—each host-initiated bus operation contains an explicit device target address—and does
not natively support a higher-level data frame concept. Broadcom has implemented a hardware/software
message encapsulation scheme that ignores the bus operation code address and prefixes each frame with a 4-
byte length tag for framing. The device presents a packet-level interface over which data, control, and
asynchronous event (from the device) packets are supported.
The data and control packets received from the bus are initially processed by the bus driver and then passed
on to the protocol driver. If the packets are data packets, they are transferred to the wireless device driver (and
out through its medium), and a data packet received from the device medium follows the same path in the
reverse direction. If the packets are control packets, the protocol header is decoded by the protocol driver. If the
packets are wireless IOCTL packets, the IOCTL API of the wireless driver is called to configure the wireless
device. The microcode running in the D11 core processes all time-critical tasks.
Broadcom_®
February 13, 2015 • 43362-DS106-R
IEEE 802.11 b/g/n MAC/Baseband/Radio + SDIO
Page 45
BROADCOM CONFIDENTIAL