BCM43362SKUBGT Datasheet, PDF (44/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ b/g/n MAC/Baseband/Radio + SDIO

BCM43362 Data Sheet
CPU and Global Functions
Section 7: CPU and Global Functions
WLAN CPU and Memory Subsystem
The BCM43362 includes an integrated ARM Cortex™-M3 processor with internal RAM and ROM. The ARM
Cortex-M3 processor is a low-power processor that features low gate count, low interrupt latency, and low-cost
debugging. It is intended for deeply embedded applications that require fast interrupt response features. The
processor implements the ARM® architecture v7-M with support for Thumb®-2 instruction set. ARM Cortex-M3
delivers 30% more performance gain over ARM7TDMI.
At 0.19 µW/MHz, the Cortex-M3 is the most power efficient general purpose microprocessor available,
outperforming 8- and 16-bit devices on MIPS/µW. It supports integrated sleep modes.
ARM Cortex-M3 uses multiple technologies to reduce cost through improved memory utilization, reduced pin
overhead, and reduced silicon area. ARM Cortex-M3 supports independent buses for Code and Data access
(ICode/DCode and System buses). ARM Cortex-M3 supports extensive debug features including real time trace
of program execution.
On-chip memory for the CPU includes 240 KB SRAM and 448 KB ROM.
One-Time Programmable Memory
Various hardware configuration parameters may be stored in an internal 1024-bit One-Time Programmable
(OTP) memory, which is read by system software after device reset. In addition, customer-specific parameters,
including the system vendor ID and the MAC address, can be stored, depending on the specific board design.
The initial state of all bits in an unprogrammed OTP device is 0. After any bit is programmed to a 1, it cannot be
reprogrammed to 0. The entire OTP array can be programmed in a single write cycle using a utility provided with
the Broadcom WLAN manufacturing test tools. Alternatively, multiple write cycles can be used to selectively
program specific bytes, but only bits which are still in the 0 state can be altered during each programming cycle.
Prior to OTP programming, all values should be verified using the appropriate editable nvram.txt file, which is
provided with the reference board design package. Documentation on the OTP development process is
available on the Broadcom customer support portal (http://www.broadcom.com/support).
Broadcom_®
February 13, 2015 • 43362-DS106-R
IEEE 802.11 b/g/n MAC/Baseband/Radio + SDIO
Page 43
BROADCOM CONFIDENTIAL