PSOC4200M Datasheet, PDF (4/42 Pages) Cypress Semiconductor – Programmable System-on-Chip

PSoC^® 4: PSoC 4200M Family
Datasheet
PSoC 4200M Block Diagram
PSoC 4200M
32- bit
AHB- Lite
System Resources
Power
Sleep Control
WIC
POR LVD
REF BOD
PWRSYS
NVLatches
CPU Subsystem
SWD/ TC
Cortex
M0
48 MHz
FAST MUL
NVIC, IRQMX
SPCIF
FLASH
128 KB
Read Accelerator
SRAM
16 KB
SRAM Controller
ROM
8 KB
ROM Controller
Peripherals
PCLK
System Interconnect ( Multi Layer AHB)
Peripheral Interconnect (MMIO)
DataWire/
DMA
Initiator/ MMIO
Clock
Clock Control
WDT
IMO ILO
Reset
Reset Control
XRES
Test
DFT Logic
DFT Analog
Programmable
Analog
SAR ADC
( 12- bit)
x1
SMX CTBm
2 x Opamp ^x2
Programmable
Digital
UDB ... UDB
x4
Port Interface &Digital System Interconnect(DSI)
Power Modes
Active/ Sleep
Deep Sleep
Hibernate
I/O Subsystem
The PSoC 4200-M devices include extensive support for
programming, testing, debugging, and tracing both hardware
and firmware.
The ARM Serial_Wire Debug (SWD) interface supports all
programming and debug features of the device.
Complete debug-on-chip functionality enables full-device
debugging in the final system using the standard production
device. It does not require special interfaces, debugging pods,
simulators, or emulators. Only the standard programming
connections are required to fully support debug.
The PSoC Creator Integrated Development Environment (IDE)
provides fully integrated programming and debug support for
PSoC 4200-M devices. The SWD interface is fully compatible
with industry-standard third-party tools. The PSoC 4200-M
family provides a level of security not possible with multi-chip
application solutions or with microcontrollers. This is due to its
ability to disable debug features, robust flash protection, and
because it allows customer-proprietary functionality to be imple-
mented in on-chip programmable blocks.
High Speed I/O Matrix
37x GPIO, 14x GPIO OVT
The debug circuits are enabled by default and can only be
disabled in firmware. If not enabled, the only way to re-enable
them is to erase the entire device, clear flash protection, and
reprogram the device with new firmware that enables debugging.
Additionally, all device interfaces can be permanently disabled
(device security) for applications concerned about phishing
attacks due to a maliciously reprogrammed device or attempts to
defeat security by starting and interrupting flash programming
sequences. Because all programming, debug, and test inter-
faces are disabled when maximum device security is enabled,
PSoC 4200-M with device security enabled may not be returned
for failure analysis. This is a trade-off the PSoC 4200-M allows
the customer to make.
Document Number: 001-93963 Rev. *G
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